What you will do
- APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process
- Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process
- Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECO
What you bring
- Apr hands on for n5/n4/n3e process using Innovus and Fusion compiler EDA tool
- tcl/csh/perl/bash. programming skill
- Timing Analysis Debugging and Fixing skills
- Experienced N4/N3e process
