Job Description

• Industry/Organization Type: Land and Offshore Engineering Solutions Provider
• Position Title: Design Engineer
• Working Location: Gul Circle
• Working Hours: Monday – Friday, 8 am – 5 pm
• Salary Package: Up to $3,500 + OT + VB
• Duration: Permanent

Key Responsibilities

• Develop engineering solutions that optimize both the technical and quality aspects for customers.
• Design products that meet specific customer requirements.
• Prepare and maintain comprehensive technical specifications, as well as operating and maintenance procedures.
• Develop and implement new product testing and acceptance procedures.
• Conduct in-plant equipment tests on newly designed products to ensure functionality and compliance.
• Actively participate in customer consultations, project discussions, and design review meetings relevant to assigned projects.
• Perform detailed engineering tasks and create/review production drawings to ensure accuracy and adherence to specifications.

APPLY NOW!!!

• A Degree in Mechanical Engineering or a related field.
• Proficiency in SolidWorks software is highly beneficial.
• Previous work experience in oilfield equipment design is considered an advantage.
• Entry-level candidates with a keen interest in design and a strong academic background are welcome to apply.

Kindly apply through ANY of the following methods:

• Submit your application by clicking the APPLY button;
• Email your resume to Job(at)anradus.com.sg. Kindly indicate #68845 on the email subject.

Anradus Application Policy: We value each application and ensure every resume is reviewed. Our process is efficient, typically concluding within 3 working days. If you do not receive communication from us within this timeframe, it's likely that your application has not been shortlisted by our client. In such cases, we recommend continuing your job search to maximize your opportunities.

Anradus Pte Ltd | EA License No. 20C0161 | Norman Wee | EA Reg No.: R23115114

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, Design Verification

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.

• Develop test plans at block, sub-system, and chip level.

• Execute SoC-based verification at full-chip.

• Write C-based lib packages and tests.

• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

• Automating the test environment for randomized testing and scoreboarding.

• Utilize advanced debugging techniques to identify and resolve design and verification issues.

• Perform root-cause analysis and work with design teams to fix identified issues

• Define and track functional and code coverage metrics to ensure thorough verification.

• Ensure that verification quality meets or exceeds industry standards and project requirements.

• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE 5-8 years Degree of experience in block, sub-system, and full-chip verification

• Should have delivered multiple chips functioning to Specification.

• Identify and manage verification deliverables, milestones, and schedules.

• Proactively identify potential verification risks and develop mitigation strategies.

• Collaborate with design, architecture, and software teams to understand and verify design intent.

• Communicate verification progress, issues, and results to stakeholders and management.

• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges

• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.

• C-based verification in an SoC environment is required

• Experience with ARM processor-based designs and low-power design techniques is a plus.

• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile

• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5

• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

About the team:

MediaTek’s Physical design team is responsible to implement top quality digital backend design for our advanced process chips which have billions of transistors. Passionate talent who are eager to join this fast-growing IC design industry and grow together with our passionate team are welcome to apply!

Job Description

• Working on 6nm and below advanced process project APR and Timing/PI sign-off
• Take the TOP and PM role for the complicated hierarchical chip (more than 20M inst plus 500+ macros)
• Take the Block or Block coordinator role for complex blocks
• Do early prediction for critical APR/Timing/PI issues

Job Requirements

• APR/Timing/PI hands-on/tapeout experience on complicated hierarchical chip
• TCL/Perl/Python/C/C++ programming skill
• Have advanced process(n6 or below) experience is a plus
• Excellent communication and team work spirit

Location: One North, Singapore

Important Note: This advertisement is meant to source suitable candidates for future openings for this position.

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, RTL Design

Responsibilities:

We are seeking a talented RTL Engineer to join our team in Singapore. As an RTL Engineer, you'll ensure the highest quality products by developing and implementing robust methodologies. Work alongside a talented team of engineers to deliver innovative solutions that meet the evolving needs of our customers.

Responsibilities

• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU

• Explore architecture and develop micro-architecture.

• RTL development for IPs and SOCs using Verilog

• 3rd party IP identification, selection, and integration

• Collaboration with verification and FPGA teams in test plan development and debug

• Collaborate with the Physical Design team to close the design on timing and power targets

• Assist in silicon bring-up and validation;

• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 5-8 years of experience.

• Possess deep and broad knowledge of current and emerging SOC design technologies.

• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC

• Demonstrate a deep understanding of customer needs and the competitive landscape.

• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output

• Can architect and guide programs across the full range of technical areas.

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

What you will do

[Physical Design]

• Work for physical design and development activities of MediaTek’s Ghz ARM-based microprocessors
• Involve in activities encompass physical design and analysis of complex and timing-critical microprocessor partition blocks and
• Technical disciplines include synthesis, floor-planning, place and route, RC extraction, timing and power optimization

[STA/Power Signoff]

• Involve in activities encompass Static Timing Analysis on advanced process nodes (28nm, 20nm, 16nm & beyond)
• Technical disciplines include STA, and analysis of complex and timing-critical microprocessor
• Work closely with RTL function designers and physical designers to optimize design components such as timing and power
• Design Methodology (1):
• This position is in charge of design methodology from RTL-Synthesis-DFT-PNR-STA-PI.
• Specific skill set is: able to boost productivity using either programming or EDA solution
• AI learning Programming is a big plus

What you will bring

• Bachelor/Masters Degree in Electrical and Electronic Engineering/Computer Engineering
• Minimum with 7 years relevant experience
• Good with concept of digital design
• Good with communication, team work and scripting skills
• Understanding of RTL2GDS flow is a plus

Location: One North, Singapore

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.

What you will do

• APU Physical Design Implementation for APU partitions focus on MDLA/NDLA n5/n4/n3e/ process
• Physical VerificaTion to deliver clean APU partition gds N5/n4/n3e/ process
• Perform Timing Closure ECO for APU partition including PrimeTime timing check and twk timing ECO

What you bring

• Apr hands on for n5/n4/n3e process using Innovus and Fusion compiler EDA tool
• tcl/csh/perl/bash. programming skill
• Timing Analysis Debugging and Fixing skills
• Experienced N4/N3e process

Location: One North, Singapore

Why MediaTek?

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact. – Join us now!

Our client is a prominent construction firm in Singapore, offering comprehensive and integrated services within the construction sector.

• Coordinate design drawings with consultants to adhere with requirements of the authorities.
• Review and give solutions to technical problems and plan, monitor and report shop drawing production progress.
• Handle technical submissions for materials, construction methods and C&S shop drawings.

Requirements:

• Professional Engineer Registered with the PE Board.
• Degree in Civil Engineering or equivalent.
• At least 3 years of design working experience with main contractors.
• Familiar in British and Singapore Design Standards.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701

Registration: R1326740

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Company's Profile
Julian Grey’s client is a global semiconductor equipment provider, specializing in inspection solutions for various industries. They have offices in APAC and are seeking motivated individuals to join their growing team.


Responsibilities

• Specify requirements and features for semiconductor equipment.
• Conceptualize and establish the architecture of innovative equipment.
• Engineer mechanical systems, incorporating the selection and utilization of motors, actuators, gear drives, pumps, and valves.
• Generate intricate engineering drawings.
• Conduct design verification and validation testing to guarantee adherence to specifications, safety regulations, and product requisites.
• Enhance the design of existing machines.
• Utilize analysis tools such as Fish Bone Diagram, FMEA, etc. to optimize processes.

Requirements

• 5 years of experience in semiconductor equipment design
• Expertise in designing automation and high precision machinery, including High-Speed Pick and Place mechanisms
• Proficient in 3D CAD software and equipment troubleshooting
• Capable of producing detailed mechanical drawings and applying knowledge of Geometric Dimensioning & Tolerancing

Follow us for more updates, interview tips!
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Our telegram channel for job opportunities - https://t.me/jobopportunitiessg


Please WA Jian Wei @ 87389860
Shortlisted candidates will be notified

Quek Jian Wei
Reg No. R22110928
Julian Grey Corporate Advisory Pte. Ltd.
EA License No: 19C9568

Job Description (Key Responsibilities):

• To ensure an efficient Civil & Structural and Geotechnical & Tunnel design is achieved in accordance with Design Criteria and relevant standards
• To liaise with internal and external parties on all Civil & Structural and Geotechnical & Tunnel design matters and advises the NSC’s PRPM/SPM/PM regularly
• To liaise with internal and external parties on all Civil & Structural and Geotechnical design matters and advises the NSC’s PRPM/SPM/PM regularly
• To co-ordinate the review of Contractor’s Civil & Structural and Geotechnical & Tunnel submissions and assists the NSC’s SPM/PM in conveying a timely response to the Contractor
• To co-ordinate the review of Contractor’s Civil & Structural and Geotechnical submissions and assists the NSC’s SPM/PM in conveying a timely response to the Contractor
• To identify and resolve potential design related issues during construction phase
• To carry out any other duties as required by the Authority’s Project Management Team, including attending technical meetings and discussions, preparation of minutes of technical meetings and to provide technical support as required in the evaluations of Contractor’s claims
• To ensure that the design intent is translated to construction on site by means of correct drawings and specifications

Job Requirements & Person Specification (Qualifications, Experience, Skills & Behaviours)

• Degree in Civil & Structural (C&S) Engineering / Construction Management (Preferable from government university in Malaysia for Malaysia candidate)
• Relevant experience in a C&S, geotechnical, tunnel, or viaduct project / construction environment
• Proficiency in relevant software programmes for planning and project work is advantageous
• Experience with C&S, geotechnical, tunnel, or viaduct design would be an advantage
• Strong analytical and communication skills
• Any offer of employment for the role of Project Engineer is also subject to approval from our client for you to commence work on their project

About Asia Infrastructure Solutions:

Asia Infrastructure Solutions is a leader in delivering project & programme management, cost management, sustainable design, engineering, business advisory and consultancy solutions for the infrastructure, buildings, and environmental sectors. The company was established by Global Infrastructure Solutions Inc. (GISI), the largest privately owned construction manager in the commercial building, industrial and healthcare markets, and a leading project / construction manager in the environmental and public infrastructure sectors. GISI and its founding members have over 90 years of project experience in Asia and currently employs 12,500 employees globally, operating in more than 90 countries.

Asia Infrastructure Solutions has a strong and diversified team of project managers, construction managers, programme managers, cost managers, sustainability consultants and various disciplines of engineering professionals with a long track record in the infrastructure, building and environmental sectors delivering the future for the built and natural environment. Our professional and technical expertise and capabilities are inherited from the Arcadis Design & Engineering / Hyder / Freeman Fox in Hong Kong and Arcadis Consulting / EC Harris / Davis Langdon & Seah businesses in Singapore which span many decades in the Asia region.

Notable projects in Singapore include the Jewel at Changi, CapitaSpring, the North-South Corridor, various hotels, data centers and corporate headquarters for the world’s leading MNCs to name a few.

We empower our employees to succeed and we invest in their professional growth through learning & development programmes as well as membership of professional bodies. Our employees also receive a range of benefits that includes opportunities for hybrid/flexible working, a share-ownership scheme, and private healthcare coverage.

Asia Infrastructure Solutions . Delivering the Future . AsiaInfraSolutions.com

Fair recruitment practices:

Asia Infrastructure Solutions adheres to the Tripartite Standards for Recruitment Practices in Singapore and uses fair, merit-based, and inclusive hiring practices.

Employment agencies:

Candidates referred by employment agencies will not be considered unless the agency has been explicitly instructed to provide candidates for the stated role.

Senior Electrical Design and Commissioning Engineer (Marine Vessel Solution)

• Penjuru (Transport Pickup Provided at: Jurong East, Choa Chu Kang, Bishan & Serangoon)
• Monday - Friday: 8.30am to 6.00pm
• S$ 4,000 - 6,000

Key Responsibilities

• Electrical Design: Collaborate on system requirements, develop schematics, select components, and design control logic for marine vessel propulsion/control systems.
• Commissioning and Integration: Oversee installation, testing, and validation of electrical systems.
• System Optimization: Analyze performance, identify optimization opportunities, and implement innovative solutions.
• Documentation and Reporting: Create technical documentation and commissioning reports.
• Regulatory Compliance and Safety: Ensure compliance with maritime regulations, industry standards, and safety guidelines.

Requirements

• Diploma/Bachelor's in Electrical Engineering or related field
• Relevant experience in electrical design/commissioning (marine propulsion/control systems preferred)
• Proficiency in electrical design software (AutoCAD Electrical, EPLAN) and simulation tools
• Knowledge of marine electrical systems, industry standards (ABS, DNV, IMO), and regulations
• Requires to travel overseas for commissioning activities (shipyards/vessels)

WhatsApp: https://wa.me/6591044149 (Shermaine)

Siah Sze Ming Reg No: R24125414

The Supreme HR Advisory Pte Ltd EA No: 14C7279

Job Description

• Prepare single-line schematics in AUTOCAD.
• Amend layout drawings and detail drawings.
• Assist in preparing project submission DWGS.
• Assist in material take-off.
• Assist in compiling the material list.
• Assist in preparing tender documents for submission.

Requirements

• Degree or diploma in mechanical engineering/material engineering.
• 2 years of relevant experience in the construction industry. Working experience in the water or wastewater industry will be an advantage.
• Fresh graduates are welcome.
• Be familiar with AUTOCAD and Bentley software.
• Must have advanced computer literacy, especially in Excel.

Responsibilities and Duties

· Develop a deep understanding of design specifications based on customer requirements, , organizational goals, and business strategies. Conceptualize and develop solutions based on project requirements and Company standards through the use of simulations/modelling to support design concept used.

· Develop design specification sheet with relevant info related to the project and update as and when required and distribute to relevant parties.

· Carry out detailed cycle time study for individual modules to select the appropriate machine or module design. Develop 3D model of the machine and/or modules assigned with optimised design for manufacturing, cost, quality and safety.

· Initiate and carry out internal design reviews to share and explain the completed modules with other departments.

· Initiate and carry out design review with customer base on project schedule

· Revise design and documents based on both internal and external review

· Create and update flow chart for the module or the entire machine

· Create part drawings and assembly drawings based on approved design and obtain approval from department manager

· Create Bill Of Materials (BOM) for the modules assigned based on design schedule given

· Create drawing release file and send out drawings for quotation

· Send out standard part list for quotation based on BOM

· Receive quotation and make price comparison spreadsheet

· Raise PR and get department manager approval and send to Purchase department for negotiation and ordering

· Promptly support any design issues discovered during fabrication and /or assembly stages

· Make necessary modifications needed, update design, drawings and get approval from department manager.

· Release revised drawings to supplier and internal assembly team

· Support machine assembly team as and when necessary, with set up and fine tuning of machines

· Carry out all the activities based on the project schedule given

· Meet quality standards while maintaining working knowledge of relevant technologies and best practices, and upholding company policies, internal, customer standards for machine building and safety.

· Develop, train, and educate junior engineers, guide technical direction, and act as a technical liaison between customers

SPECIAL NOTES:

The incumbent (s) of this position is expected to perform all other related duties as assigned

Job Scope:

• Lead the design and development of engineering projects, ensuring compliance with specifications and standards
• Collaborate with cross-functional teams, including manufacturing, quality assurance, and project management
• Create and review detailed design drawings and models using CAD software
• Conduct design analysis and simulations to validate performance and reliability
• Mentor and provide guidance to junior engineers and design team members
• Manage project timelines and deliverables, ensuring adherence to schedules and budgets
• Coordinate with clients and stakeholders to gather requirements and provide technical support
• Identify and troubleshoot design issues, implementing effective solutions
• Stay updated on industry trends and emerging technologies to enhance design processes
• Prepare technical documentation and reports for project milestones and reviews

Requirements:

• Degree in Mechanical or Mechatronics Engineering
• Over 5 years of experience in semiconductor equipment design
• Strong knowledge and experience in:
• Design of automation or semiconductor equipment
• High precision machine design
• High-speed pick and place mechanisms
• Familiarity with 3D Computer Aided Design software
• Ability to plan, prioritize, and coordinate projects effectively
• Self-motivated and capable of independent work, with strong communication skills
• Equipment troubleshooting skills
• Ability to produce detailed mechanical drawings and apply Geometric Dimensioning & Tolerancing knowledge

Interested candidates who wish to apply for the advertised position, please click on the APPLY button below to send in your resume to [email protected]

EA License No: 13C6305

Reg. No.: R1981808

For candidate who applied for the advertised position is deemed to have consented to us that we may collect, use or disclose your personal information for purpose in connection with the services provided by us.

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Design and build memory or circuit blocks at the gate or transistor level
• Simulate and analyze the circuit design using transistor level simulators
• Extract the layout and perform post-layout simulations and verification
• Floorplan physical implementation and layout integration of design components
• Integrate characterization flow to extract timing and power information
• Develop scripts to automate characterization flow, simulations, and verification
• Specify and verify various behavioral and physical memory models
• Document the design specifications, behavioral description, and timing diagrams
• Help specify silicon test plan and correlate silicon to simulation data

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
• Proficiency in running simulators, writing automation scripts, and are tools savvy
• Understanding of memory behavioral and physical models is a plus
• Expertise in memory circuit design is a plus
• Understanding of DFT schemes and chip level integration is a plus
• Good communication, interpersonal, and leadership skills
• Motivated, self-driven and good at multi-tasking
• Passion for solving complex problems and willingness to learn

Qualifications

• Requires a BS in Electrical or Computer Engineering
• Some years of relevant experience is preferable
• Fresh graduates are encouraged to apply

Skills and responsibilities:

• Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
• Proficient with a full Netlist/Gates to GDS flow, inclusive of all construction stages (e.g. RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis) for complex digital blocks of up to 12Mgates/3M instances with embedded macros. Ability to handle multiple block assignments in parallel is required.
• Proficiency in UNIX/Linux and scripting languages is advantageous.

Required Qualifications:

• Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
• Minimum of 2 years or more experience in a relevant field.

Key Responsibilities:

• Collaborate with the front-end design team to complete chip floorplan, clock architecture, and power plan.
• Take ownership of physical design tasks, including P&R (Place and Route), formal verification, static timing analysis, physical verification, power analysis, and design for reliability.
• Manage the full backend design flow, ensuring that designs meet all specifications and constraints for successful tapeout.
• Research and develop methodologies for advanced process nodes in physical design.
• Build and optimize automated physical design platforms to enhance efficiency.
• Write and maintain scripts (TCL, Perl, or Python) to support design tasks and tool automation.
• Work with EDA tools to perform analysis and optimizations, ensuring the quality of physical design and compliance with industry standards.

Required Qualifications:

• Extensive experience in the digital backend design field, with a focus on physical design, P&R, static timing analysis, and verification.
• Strong expertise in physical design methodologies for advanced process nodes.
• Proficient in scripting languages such as TCL, Perl, or Python to automate tasks and build platforms.
• In-depth knowledge of EDA tools used in physical design, such as Cadence, Synopsys, or Mentor Graphics.
• Experience with design for reliability, power analysis, and physical verification.
• Proven track record of successful tapeouts and deep understanding of the full backend design flow.

Thank you for your application and we regret that only shortlisted applicants will be notified

By submitting any application or resume to us, you will be deemed to have agreed & consented to us collecting, using, retaining & disclosing your personal information to prospective employers with the services provided by us.

EA (18C9514/R23118479)

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Lead Engineer, Design Verification

(Senior Staff Engineer)

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.

• Develop test plans at block, sub-system, and chip level.

• Execute SoC-based verification at full-chip.

• Write C-based lib packages and tests.

• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.

• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.

• Automating the test environment for randomized testing and scoreboarding.

• Utilize advanced debugging techniques to identify and resolve design and verification issues.

• Perform root-cause analysis and work with design teams to fix identified issues

• Define and track functional and code coverage metrics to ensure thorough verification.

• Ensure that verification quality meets or exceeds industry standards and project requirements.

• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE 8-12 years Degree of experience in block, sub-system, and full-chip verification

• Should have delivered multiple chips functioning to Specification.

• Identify and manage verification deliverables, milestones, and schedules.

• Proactively identify potential verification risks and develop mitigation strategies.

• Collaborate with design, architecture, and software teams to understand and verify design intent.

• Communicate verification progress, issues, and results to stakeholders and management.

• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges

• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.

• C-based verification in an SoC environment is required

• Experience with ARM processor-based designs and low-power design techniques is a plus.

• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile

• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5

• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to [email protected] stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Design and build memory or circuit blocks at the gate or transistor level
• Simulate and analyze the circuit design using transistor level simulators
• Extract the layout and perform post-layout simulations and verification
• Floorplan physical implementation and layout integration of design components
• Integrate characterization flow to extract timing and power information
• Develop scripts to automate characterization flow, simulations, and verification
• Specify and verify various behavioral and physical memory models
• Document the design specifications, behavioral description, and timing diagrams
• Help specify silicon test plan and correlate silicon to simulation data

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
• Proficiency in running simulators, writing automation scripts, and are tools savvy
• Understanding of memory behavioral and physical models is a plus
• Expertise in memory circuit design is a plus
• Understanding of DFT schemes and chip level integration is a plus
• Good communication, interpersonal, and leadership skills
• Motivated, self-driven and good at multi-tasking
• Passion for solving complex problems and willingness to learn

Qualifications

Requires a BS in Electrical or Computer Engineering and > 5 years of related experience

What you will do:

• Provides sales support to the engineering /sales team. Conducts engineering design and processes and / or financial analysis during project development. Generates take-off plans and specifications. Develops and writes estimates or proposals. May call on potential customers as directed by sales managers.

How you will do it:

• Perform drafting, design and prepare engineering drawings (2D) and documentation as per customer’s/project requirements.
• Create electrical schematic, Design layout plans and detailed designs with AutoCAD software.
• Provide pre-sales support to Sales team, including proposal costing and attending technical clarifications
• meeting and/or presentation with customers
• Products sourcing from suppliers.
• Compilation and submission of all documentations as required as per the project requirements.
• Review customer’s technical comments and revise documentation and drawings.
• Visual Inspection and quality check on products/Systems.
• Prepare Functional Test Documents and Assist Project Operations Team on functional testing.
• Liaise and maintain good relationship with customers, subcontractors and suppliers

What we look for:

• Min. Diploma/Degree in Electrical/ Electronic Engineering
• More than 5 years’ experience in Marine Offshore Protection System with related experience.
• Good knowledge of NFPA/Marine Classification Rules & Regulations
• Familiar with Fire & Gas Detection, Vesda Systems.
• Proficiency in AutoCAD and Microsoft Office especially Microsoft Word and Excel.
• Resourceful, results-oriented, excellent interpersonal skills and business acumen
• Able to work independently and deliver results for multiple projects under tight deadlines
• Willingness to learn new things.
• Basic knowledge OT systems, such as SCADA and DCS
• Basic understanding of cybersecurity concepts and best practices, including risk management, threat modeling, and incident response
• Excellent analytical and problem-solving skills
• Strong communication and collaboration skills

What we offer:

• Competitive salary
• Paid vacation/holidays/sick time
• Comprehensive benefits package
• On the job/cross training opportunities
• Encouraging and collaborative team environment
• Dedication to safety through our Zero Harm policy

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Skills and responsibilities:

• Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
• Proficient with a full Netlist/Gates to GDS flow, inclusive of all construction stages (e.g. RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis) for complex digital blocks of up to 12Mgates/3M instances with embedded macros. Ability to handle multiple block assignments in parallel is required.
• Proficiency in UNIX/Linux and scripting languages is advantageous.

Required Qualifications:

• Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
• Minimum of 5 years or more experience in a relevant field.

Job Description

• Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
• Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
• Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
• Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

• Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
• Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
• Static timing analysis, power and noise analysis and back-end verification across multiple projects.
• Proficient with backend design EDA tools, Synopsys ICC2 preferred
• Successfully track records of taping out complex SOC
• Working knowledge of deep sub-micron routing issues as they relate to power and timing.
• Proficiency using Perl and TCL
• Self-motivated team worker, good verbal and written communication skills

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655

EA Reg No: R1109557 Rose