Total 5 staff nurse job vacancies in Engineering category in Singapore

Job Description & Requirements

We are looking for a Senior/Staff Analog Layout Engineer to contribute to the development of High-Speed Connectivity, Broadband Analog and Computing/Storage-Memory Data-Transport products (including functional blocks such as high-speed digital, multi-GHz ADC/DAC, PLL/DLL serial and parallel I/O, and clock generation/distribution for custom ICs). The candidate must have a proven record of laying out high-performance analog circuits in state-of-the-art CMOS process technologies, successfully performed top-level integrations, and placed products into volume production multiple times.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and at least 2-5+ years of related professional experience.
• Master’s degree in Computer Science, Electrical Engineering or related fields with 3+ professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English

To apply, please submit your application via this link: Marvell Careers

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

We are looking for a Senior Staff Analog Layout Engineer to contribute to the development of High-Speed Connectivity, Broadband Analog and Computing/Storage-Memory Data-Transport products (including functional blocks such as high-speed digital, multi-GHz ADC/DAC, PLL/DLL serial and parallel I/O, and clock generation/distribution for custom ICs). The candidate must have a proven record of laying out high-performance analog circuits in state-of-the-art CMOS process technologies, successfully performed top-level integrations, and placed products into volume production multiple times.

What You Can Expect

• Own a chip/macro layout
• Own the overall project schedule, leveraging the design lead and layout manager as needed.
• Work effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etc. Represent layout within the project cross-function team with leading a team, including remote design teams
• Help implement project specific guidelines and ensure team-members follow them
• Contribute to overall team through tool testing, script development, flow documentation, training, etc.
• Keep abreast of technology and tool developments and bring new ideas to the team

What We're Looking For

• Bachelor’s or Master's degree in Computer Science, Electrical Engineering or related fields and at least 5+ years of related professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English
• Team player

We are looking for a Staff Analog Layout Engineer to contribute to the development of High-Speed Connectivity, Broadband Analog and Computing/Storage-Memory Data-Transport products (including functional blocks such as high-speed digital, multi-GHz ADC/DAC, PLL/DLL serial and parallel I/O, and clock generation/distribution for custom ICs). The candidate must have a proven record of laying out high-performance analog circuits in state-of-the-art CMOS process technologies, successfully performed top-level integrations, and placed products into volume production multiple times.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and at least 5+ years of related professional experience.
• Master’s degree in Computer Science, Electrical Engineering or related fields with 3+ professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English

The Optics team builds highly integrated component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell The Optics team at Marvell is dedicated to developing cutting-edge, highly integrated component platforms that leverage high-speed Silicon Photonics, advanced transmit and receive amplifiers, and custom controller ASICs featuring Marvell’s DSP technology. These sophisticated components are powered by robust embedded firmware, making them versatile and high-performing. Our team leads the entire lifecycle of these integrated optical systems, from design and rigorous verification to comprehensive validation. We conduct extensive system-level testing across various operating conditions to ensure optimal performance and reliability of the hardware, firmware, and control systems. This commitment to excellence drives Marvell’s leadership in high-speed optical technologies.

Job Responsibilities

• Be a key contributor to development of state-of-the-art silicon photonics light engine at Marvell.
• Responsible for all aspects of engineering design, process development, and productization for Marvell’s next-generation optics products, involved in a full product lifecycle and will carry new products from inception all the way to NPI.
• Implement creative design solutions to accelerate design and tape-out of photonics products.
• Collaborate closely with CAD and foundry process teams working on the development and support of next generation photonics design flow and design automation.
• Collaborate with cross-functional teams consisting of Digital and Analog Circuit designers, Signal/Power Integrity, and substrate layout, and system design team.

Requirements

• PhD in Electrical Engineering, Photonics or related discipline, or equivalently those with an M.S/M. Eng. with industrial experience in photonic integrated circuit design and validation will also be considered.
• A strong understanding of optical component design, fabrication and validation.
• Solid background in semiconductor optical devices such as modulators, detectors and other integrated waveguide devices.
• Use of industry standard optical and electrical modeling and simulation software to design electro-optical devices and generate GDS level mask data for device fabrication.
• Direct experience of optical components and integrated circuits characterization including optical coupling, DC and RF testing. Test automation in R&D environment.
• Familiarity or direct experience in the standard Si/CMOS/MEMS process technologies required for fabrication and integration of electrical and optical devices.
• Demonstrated ability to work collaboratively in a fast-paced, cross-functional team environment.
• Self-starter. Motivated to get things done.
• Willingness and ability to be hands on and work in the lab.
• Strong presentation and communication skills

We are looking for a Staff Analog Layout Engineer to contribute to the development of High-Speed Connectivity, Broadband Analog and Computing/Storage-Memory Data-Transport products (including functional blocks such as high-speed digital, multi-GHz ADC/DAC, PLL/DLL serial and parallel I/O, and clock generation/distribution for custom ICs). The candidate must have a proven record of laying out high-performance analog circuits in state-of-the-art CMOS process technologies, successfully performed top-level integrations, and placed products into volume production multiple times.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and at least 5+ years of related professional experience.
• Master’s degree in Computer Science, Electrical Engineering or related fields with 3+ professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English