Total 81 quality control engineer job vacancies in D12 Balestier, Serangoon, Toa Payoh

As a Non-Volatile Memory Quality & Reliability Assurance (NVMQRA) Engineer at Micron Technology, you will be responsible for performing formal Failure Analysis of customer reported failing devices via the Returned Material Authorization (RMA) process. You will be required to summarize lab analysis results at the electrical and physical level to identify root cause and establish an associated containment plan. In this role, you will have the opportunities to collaborate with various engineering and manufacturing stakeholders to evaluate and review Corrective Actions /Preventive Actions. You will provide documentation of the RMA findings and oversee the final customer report till closure. In addition, for the senior role, you will be asked to provide guidance and lead the team when solving complex unplanned deviations reported by our customers. Project management skills are necessary and the ability to make critical decisions that directly translate to quality and timely completion of the project is highly desirable. You will also be required to spearhead the sustaining efforts and keeping up to date on new product knowledge, as well as developing and mentoring new talents.

Responsibilities and Tasks

Perform Failure Analysis of Customer Returns

• Understand customer complaint of the memory component failure
• Initiate communication with Micron Customer-facing team for further details on customer complaint, requesting additional questions to provide best opportunity for successful analysis
• Perform bench level analysis including initial data image analyis/examination
• Perform Automated Test Equipment (ATE) analysis and interpret results
• Work with the appropriate engineering teams (e.g., PE, PYE) to perform detailed fault isolation when electrical failure has been confirmed
• Summarize findings and submit for physical failure analysis (PFA).

Provide FA Reports for Micron Customer Facing Team for Communication to External Customers

• Summarize analysis at electrical and physical level into customer friendly formats.
• Work with the appropriate manufacturing Global Quality teams through the appropriate request systems (example: GPSS) for Root Cause and/or Corrective Action and a containment plan
• Identify potential risk to external customers
• Communicate with respective BU (Business Unit) on potential impact to customers
• Communicate FA updates through interim reports or during scheduled meetings with the customers.
• Provide formal FA Report with findings

Sustain Knowledge of Device Capabilities and Characteristics

• Keep up to date with latest Fab/ASM process technology
• Understand datasheet specifications for each device and the differences from previous technode for NOR * NAND product family
• Comprehension of qualification data and potential impact to customer operation
• Stay up-to-date on common customer applications and usage model
• Partnering with customer support team to resolve ongoing customer issues

Qualifications and Experience

• Excellent verbal and written communication skills in English. The ability to communicate clearly and concisely both verbally and in writing is critical in this role.
• Good organization skills and ability to multitask and coordinate between multiple issue at any given time.
• Ability to work effectively in cross-functional teams and handle pressure situations in a professional manner
• Excellent problem-solving and analytical skills with strong attention to details.
• Familiarity with NexTest /Teradyne bench analytical tools, scripting in linux console will be an added advantage.

Candidates with 2-3 years of experience in the semiconductor industry as Product or QA engineer are preferred. Relevant experienced candidates will be considered for the Senior Role.

Education

A Bachelor or Masters Degree in Electrical Engineering or similar field of study.

As a Senior Industry 4.0 (I4.0) Analyst at Micron Technology, Inc., you will report to the Smart Manufacturing and Artificial Intelligence organization. The team defines, drives and delivers end to end smart manufacturing solution, integrated across functions of the business. The team will investigate applying industry-leading the best methodologies in automation, AI and machine learning to enhance Micron’s product development, business, and administrative processes across the company.

Responsibilities and Tasks

• Lead the analysist for complex business problems and issues using data from internal and external sources to provide insight to decision-makers. Identifies and interprets trends and patterns in datasets to locate influences.
• Constructs forecasts, recommendations and strategic/tactical plans based on business data and market knowledge.
• Creates specifications for reports and analysis based on business needs and required or available data elements.
• May provide consultation to users and lead cross-functional teams to address business issues.
• May directly produce datasets and reports for analysis using system reporting tools
• Understands business problem and translates user requirements into technical language and vice versa for data science / technical solution / IT teams.
• I4.0 Analyst with strong domain knowledge is preferred and will bridge the gap between users and developer team
• Accountable to ensure modules / functionalities address current metrics gaps and new business opportunity
• Translating project expected project metrics gain into dollar values, partnering with Finance
• Defining priority for projects for strategic pillar roadmap provided by Strategy Pillar Leader
• Conduct diagnostic and understand gaps and areas of improvement in current IIoT solutions and ways of working
• Work with PDE, Data Scientist, System Architect and IIoT end users to design & define requirements and analyze information, production interdiction that related to the adoption of IIoT for Smart Manufacturing
• Ensure optimization and standardization of tools and processes leveraging central team business partners to allow I4.0 solutions to be scaled sustainably across Micron Backend sites
• Develop business case, including impact validation approach, ROI of potential solutions and prioritize & propose projects for implementation
• Lead projects and activities that will require the coordination, support, and management of resources from global teams
• Provide expert functional and process guidance on system interfaces and capabilities

Qualifications

• Master/Bachelor's Degree in Electrical Engineering, Specialized in Data Analytic.
• At least 5-7 years of work experience in Assembly & Test and Post Wafer Fab (PwF) Process & Equipment Engineering or similar operations functions, good knowledge in High Bandwidth Memory (HBM) production is preferred
• Familiar with Composite Metro solution development, systems and solutions for high volume and high mix production environment
• Good interpersonal skills with demonstrable ability to effectively lead and present to small and large groups
• Proven ability to work multi-functionally with peers, senior and mid-level management
• Peer leadership and relationship management skills
• Strong analytical and problem-solving skills
• Highly organized and ability to remain flexible to the changing business needs

About Micron
As the leader in innovative memory solutions, Micron is helping the world make sense of data by delivering technology that is transforming how the world uses information. Through our global brands — Micron, Crucial and Ballistix — we offer the industry’s broadest portfolio. We are the only company manufacturing today’s major memory and storage technologies: DRAM, NAND, NOR and High Bandwidth Memory. Our solutions are purpose built to demonstrate the value of data to unlock financial insights, accelerate scientific breakthroughs and enhance communication around the world.We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status

Analyzes complex business problems and issues using data from internal and external sources to provide insight to decision-makers. Identifies and interprets trends and patterns in datasets to locate influences. Constructs forecasts, recommendations and strategic/tactical plans based on business data and market knowledge. Creates specifications for reports and analysis based on business needs and required or available data elements. May provide consultation to users and lead cross-functional teams to address business issues. May directly produce datasets and reports for analysis using system reporting tools.

As a Quality & Reliability Assurance Engineer in Global Quality, we are encouraged to conduct electrical failure analysis and data analysis of next-generation 3D NAND memory devices. To sustain and improve Micron's memory quality, and developing outgoing monitor strategies together with risk assessment and product disposition in deviation management in HVM (high volume manufacturing( environment.

Responsibilities and Tasks

• Develop outgoing quality and reliability monitor strategies of NAND products in production phase.
• Perform product failure analysis on rejects to identify the failure mode and mechanisms that will lead to successful corrective actions and/or preventive actions.
• Assist and consult on post qualification quality and reliability issues and assist in the analysis and disposition of these materials.
• Coordinate with Research and Development and Product Engineering teams to comprehend new reliability issues and how to test for and assess their impact to customer risk and reliability.

Requirements

• Excellent problem-solving and analytical skills with strong attention to details.
• Ability to communicate clearly and concisely both verbally and in writing is essential in this role.
• Good organization skills and ability to multitask and coordinate between multiple issue at any given time.
• Ability to work optimally in cross-functional teams and handle pressure situations in a professional manner.
• Candidates with at least 2 years of experience in the semiconductor industry as QRA or Product Engineer are preferred but fresh graduates are welcomed to apply. Experience in flash memory debugging and failure analysis is a plus.
• Bachelor's or Master's degree Electrical Engineering, Electronics Engineering, or a related discipline.

Requirements

As a Data Science Engineer at Micron, you will employ techniques and theories drawn from areas of mathematics, statistics, semiconductor physics, materials science, and information technology to uncover patterns in data from which predictive models, actionable insights, and solutions can be developed.

You will interact with experienced Data Scientists, Data Engineers, Business Areas Engineers, and UX teams to identify questions and issues for data analysis projects and improvement of existing tools. In this position, you will help develop software programs, algorithms and/or automated processes to cleanse, integrate, and evaluate large datasets from multiple disparate sources. There will be significant opportunities to perform exploratory and new solution development activities.

Responsibilities include, but not limited to:

• Strong desire to grow a career as a Data Scientist in highly automated industrial manufacturing doing analysis and machine learning on terabytes and petabytes of diverse datasets.
• Experience in the areas: statistical modeling, feature extraction and analysis, supervised/unsupervised/semi-supervised learning. Exposure to the semiconductor industry is a plus but not a requirement.
• Ability to extract data from different databases via SQL and other query languages and applying data cleansing, outlier identification, and missing data techniques.
• Strong software development skills.
• Strong verbal and written communication skills.
• Experience with or desire to learn:
• Machine learning and other advanced analytical methods
• Fluency in Python and/or R
• pySpark and/or SparkR and/or SparklyR
• Hadoop (Hive, Spark, HBase)
• Teradata and/or another SQL databases
• Tensorflow, and/or other statistical software including scripting capability for automating analyses
• SSIS, ETL
• Javascript, AngularJS 2.0, Tableau
• Experience working with time-series data, images, semi-supervised learning, and data with frequently changing distributions is a plus
• Experience working with Manufacturing Execution Systems (MES) is a plus
• Existing papers from CVPR, NIPS, ICML, KDD, and other key conferences are plus, but this is not a research position

Designs, develops and programs methods, processes, and systems to consolidate and analyze unstructured, diverse “big data” sources to generate actionable insights and solutions for client services and product enhancement. Interacts with product and service teams to identify questions and issues for data analysis and experiments. Develops and codes software programs, algorithms and automated processes to cleanse, integrate and evaluate large datasets from multiple disparate sources. Identifies meaningful insights from large data and metadata sources; interprets and communicates insights and findings from analysis and experiments to product, service, and business managers.

When you join MSB Industrial Engineer (IE) team, you will be learning the skills for capacity modeling, capital planning & execution and factory commit. In the course of work, you'll be exposed to counterparts from a diverse range of backgrounds and teams and will have opportunity for contributing to the organization while learning from each other. You're also part of the team that produce data and analyses supporting factory critical metrics decision making that include (but not exhaustively) capital expenditure, loading (revenue) commit and equipment performance improvement activity, Some aspects of the work are below

Modeling

• Perform line study for setting up capacity model
• Apply statistical analysis to acquire model parameters and Factory Operation related buffer strategy
• Work with relevant teams for auditing and updating model parameters (utilization, UPH, overhead, etc)
• Maintain Factory Planning Master Data in a manner that supports capacity analysis, factory scheduling, supply planning and multi-functional reporting needs
• Use Microsoft Excel and other applications to supplement standard model for quick turn-around analysis

Strategic Planning

• Maintain robust database of key improvement activities and equipment delivery
• Perform capacity analysis loading plan for setting boundary condition, submitting capital requirement and requesting key activities for throughput improvement
• Perform bottoms-up analyses of approved loading and modeling changes
• Coordinate space planning for incoming tool with facility, relevant equipment and manufacturing team members
• Engage in factory space optimization and network capital optimization by identifying under-utilized/obsolete capacity for transfer, re-sale and/or scrap

Factory Commit

• Engage in weekly factory commit activity in collaboration with Factory Planning and Operation teams (current quarter / rolling 13 weeks), and Central Planning teams (up to 9 months)
• Submit equipment and tooling purchase request and coordinate downstream activities: PO release, space enablement, delivery and production release
• Comprehend Tactical Operation constraint in identifying dynamic constraint workstation for robust factory loading commit
• Collaborate with Strategic Scenario and Capital Planning team on investigation of tactical boundary condition comparison with strategic boundary condition

Capital Planning

• Take charge of capacity related capital and Off-Capital items through capital lifecycle: proposal à disposal through appropriate business process and in timely manner
• Strive for capital optimization through network balancing
• Maintain capital related information in system and offline database for own area (capacity and non-capacity related) in robust manner

Space Planning

• Collaborate with Facility IE team on detailed space enablement plan for incoming tools
• Maintain database of incoming and excess tool list for communication with Facility IE

Reporting

• Understand assumptions in reports and use them effectively
• Develop and maintain reports that effectively communicate capacity information

Project Management

• Run regular meeting, take meeting minutes, record action items and ensure closed-loop and accurate completion of action items
• Use established project management approach and methodology when serving as project manager

Continuous Improvement

• Possess a continuous improvement process (CIP) approach where you are always looking for ways to improve current way of doing things
• Apply new (e.g. RPA, Tableau, Power BI) and traditional (Excel, VBA) methods to improve and automate tasks & visualization in the planning system/models

Compliance

• Finishes the required training timely
• Conducts all work in accordance with Micron EHS (Environment, Health, Safety) and ethics policies
• Provide timely feedback when quality, safety, or ethical issues arise

Requirements:

• Degree in Industrial/Mechanical/Computer Engineering and Computer Science preferable
• With at least 2 years of CCA in university, preferably in leadership positions.
• Good in written communication and presentation skills.
• Highly motivated to work in a dynamic environment, with good integrity and character.
• Programming skill will be an added advantage.
• Ability to quickly analyze situations, identify issues, and develop effective solutions under tight deadlines.
• Demonstrated capacity to maintain composure and productivity in high-pressure environments, adapting to changing priorities and challenges.
• Proven ability to prioritize tasks, manage numerous projects simultaneously, and meet deadlines without compromising quality.
• Previous internship experience in a related field, demonstrating practical application of skills and knowledge in a professional setting will be an added advantage.
• Keen in semiconductor industry
• Possess advanced Literacy and Numeracy skills

Excellent execution on assembly process for 1st NPI success and smooth transfer process from NPI to HVM

• Excellent execution of the qualification of NPI products / packages build that proliferate from the pilot products and packages according to planned timeline
• Full responsible on support NPI business process with process TRA, POS, PFMEA/QCP, risk mitigation and documentations.
• Deliver BIC yield and cost on product NPI with integration of DFx BIC package solution, process guideline and design rules.
• Collaboration with multi-functional team from NPI to LVM/HVM process transfer.
• On-time execution of NPI Customer samples and Engineering Samples build for new products and package

SME Process Owner Responsible for Continuous Improvement on Process Yield, Defect Elimination and Process Characterization

• Process owner to perform on-time detection with data analysis for process yield improvement. Lead the defect elimination and continue improvement action, with problem solving methodology, statistical analysis and integration solution decision.
• Process owner to develop process recipe for BIC UPH, conducting process characterization to define process parameters and boundary.
• Continuous develop in depth assembly process technical knowledge, well understand process capability/tolerance//spec limit/CpK, and apply key tools PFMEA/QCP/APC/FDC/Alarm on assembly processes Cz/Development/NPI.
• Global leader for cross team collaboration on network BKM, process recipe spec and recipe standardization/conversion.

Technology enablement and development – Process, Material, Equipment

• Participate and support Product Roadmap, to enable key process capability and technology development to ensure packaging solution is ready prior 1st Qual Silicon deliver.
• Frequent engagement with equipment and material supplier (at least interval of monthly or daily/weekly for process issues)
• Collaboration with Supplier and involvement Supplier Roadmap (Material/Equipment/OSAT), to understand market trends and competitor’s direction, ensure key process technology and capability enablement is in-line.
• Frequent review and participant Competitor Analysis, to understand market trends and competitor’s technology/capability boundary
• Engage and follow PDE business process (TGR, TORB, KEG interlock) for new technology qualification, alignment and safe launch

Teamwork and General expectation

• Trainer/Buddy/Mentor for new team members, build effective relationships within team and cross team (peers, counterpart)
• Regularly review data and direction with supervisor. Demonstrate sound data analysis and judgment. Present reports and findings with appropriate conclusions, recommendations and decision making.
• Develop, or coordinate development of, training materials for existing/new process
• Safety Identify and promptly report hazards, follow safety procedures and area work rules including proper PPE, lockout and chemical safety.

Requirements:

• Bachelors/ Masters in Engineering
  
• Showcase leadership experience/potential
  
• Have engaged in projects during internships
• Great teammate
  
• Showcase critical thinking
• Keen interest in Semiconductor industry
  

Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.

Responsibilities

Excellent execution on assembly process for 1st NPI success and smooth transfer process from NPI to HVM

• Excellent execution of the qualification of NPI products / packages build that proliferate from the pilot products and packages according to planned timeline
• Full responsible on support NPI business process with process TRA, POS, PFMEA/QCP, risk mitigation and documentations.
• Deliver BIC yield and cost on product NPI with integration of DFx BIC package solution, process guideline and design rules.
• Collaboration with multi-functional team from NPI to LVM/HVM process transfer. On-time execution of NPI Customer samples and Engineering Samples build for new products and packages

SME Process Owner Responsible for Continuous Improvement on Process Yield, Defect Elimination and Process Characterization

• Process owner to perform on-time detection with data analysis for process yield improvement. Lead the defect elimination and continue improvement action, with problem solving methodology, statistical analysis and integration solution decision.
• Process owner to develop process recipe for BIC UPH, conducting process characterization to define process parameters and boundary.
• Continuous develop in depth assembly process technical knowledge, well understand process capability/tolerance//spec limit/CpK, and apply key tools PFMEA/QCP/APC/FDC/Alarm on assembly processes Cz/Development/NPI.
• Global leader for cross team collaboration on network BKM, process recipe spec and recipe standardization/conversion.

Technology enablement and development – Process, Material, Equipment

• Participate and support Product Roadmap, to enable key process capability and technology development to ensure packaging solution is ready prior 1st Qual Silicon deliver.
• Frequent engagement with equipment and material supplier (at least interval of monthly or daily/weekly for process issues)
• Collaboration with Supplier and involvement Supplier Roadmap (Material/Equipment/OSAT), to understand market trends and competitor’s direction, ensure key process technology and capability enablement is in-line.
• Frequent review and participant Competitor Analysis, to understand market trends and competitor’s technology/capability boundary
• Engage and follow PDE business process (TGR, TORB, KEG interlock) for new technology qualification, alignment and safe launch

Teamwork and General expectation

• Trainer/Buddy/Mentor for new team members, build effective relationships within team and cross team (peers, counterpart)
• Regularly review data and direction with supervisor. Demonstrate sound data analysis and judgment. Present reports and findings with appropriate conclusions, recommendations and decision making.
• Develop, or coordinate development of, training materials for existing/new process
• Safety Identify and promptly report hazards, follow safety procedures and area work rules including proper PPE, lockout and chemical safety.

Qualification

• Bachelor or Masters in Electrical Engineering, Materials Science, Chemical Engineering, or related field. A PhD is a plus.
• 1-3 or more years of experience in Semiconductor Manufacturing, Process & Equipment Engineering and/or New Product Introduction.
• Demonstrated track record in baseline performance improvement, business process creation, process simulation techniques, data interpretation skills and proficiency in statistical analysis/method.
• Be able to comfortably work across organizational boundaries and geographies.
• Ability to effectively collaborate with multi-functional organizations to understand needs and translate them into actionable plans, deliverables, and resource requirements.
• Organized, meticulous, and strong focus on results.
• Excellent analytical skills
• Excellent communication and written skills

Advance Packaging Integration – Senior Engineer (Package Development Engineering, Silicon Technology Package Integration) (PDE STPI)

We are looking for a Package Silicon Integrator in Package Development Engineering (PDE) Senior Engineer who will lead and drive Micron’s Packaging Technology Development Projects meeting Time to Market (TTM) business unit needs as well as meeting performance targets for Thermal, Electrical, Mechanical, Reliability and Cost. You will collaborate with Micron’s multi-functional team that include Product Development, Wafer level process, Assembly, Test, Manufacturing and Global Quality. Together, we will be responsible for the designing Test Vehicle Development Strategy, and execution to definition, development, and delivery of state-of-the-art product/packages that will shape the future of advanced computing, automotive and mobile products.

Responsibilities will include, but are not limited to:

• Drive package technology integration activities for the silicon test chip development projects and support NPIs to keep roadmap items on track to meet “go to market” timelines.
• Coordinate core team in Development and NPI space of advanced 2.5D/3D packages and standard packaging to drive material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable Design for Manufacturing (DFM) and Design for Reliability (DFR) requirements.
• Evaluate wafer design inclusive of bondpad, scribe, pillars/bump and polyimide, and drive materials and BOM choices such as die thickness and mold compound to meet chip package interaction requirements.
• Drive materials characterization from both package and die components to understand chip package interaction mechanism using TMA, DMA, nanoindentation, and packaging mechanical and thermal stress stimulus.
• Drive novel solutions with silicon design and product teams to recommend the optimum package solutions to meet electrical, mechanical (1st, 2nd, and 3rd level interconnect), thermal, reliability, cost, and other system level requirements.
• Interface closely with multi-functional team that include Product Development, Wafer Level Process, Assembly, Test, Manufacturing and Global Quality and manage the product/package to mass production.

Requirements:

• Bachelor/Masters of Science in physics, materials, mechanical, chemical, or electrical engineering. MS or PhD preferred
• 5+ years of relevant experience in semiconductor manufacturing or a related field, with hands-on experience in semiconductor packaging or Frontend processes, specifically in technology on
• Appreciation for Structured Problem Solving
• Ability to interpret die-, package-, and system-level design and simulation (thermal/mechanical/electrical) methodologies and results
• Knowledge in Chip Package Interaction (CPI)
• Experience and working knowledge with 2.5D/3D heterogeneous integration technologies such as WLFO, SoIC, CoWoS, WoW, InFO, and other chiplet/SiP architectures is a plus
• Experience with wafer bumping, package assembly, substrate technology, BOM selection, testing and product development lifecycle
• Excellent communication skills with the ability to convey complex technical concepts to both technical and non-technical partners
• Demonstrated leadership experience in guiding multi-functional teams and driving technical excellence

Keen on the role? Apply now!

Advance Packaging Integration – Senior Engineer (Package Development Engineering, Silicon Technology Package Integration) (PDE STPI)

We are looking for a Package Silicon Integrator in Package Development Engineering (PDE) Senior Engineer who will lead and drive Micron’s Packaging Technology Development Projects meeting Time to Market (TTM) business unit needs as well as meeting performance targets for Thermal, Electrical, Mechanical, Reliability and Cost. You will collaborate with Micron’s multi-functional team that include Product Development, Wafer level process, Assembly, Test, Manufacturing and Global Quality. Together, we will be responsible for the designing Test Vehicle Development Strategy, and execution to definition, development, and delivery of state-of-the-art product/packages that will shape the future of advanced computing, automotive and mobile products.

Responsibilities will include, but are not limited to:

• Drive package technology integration activities for the silicon test chip development projects and support NPIs to keep roadmap items on track to meet “go to market” timelines.
• Coordinate core team in Development and NPI space of advanced 2.5D/3D packages and standard packaging to drive material and BOM choices, body sizes, manufacturability, and package constructions to achieve acceptable Design for Manufacturing (DFM) and Design for Reliability (DFR) requirements.
• Evaluate wafer design inclusive of bondpad, scribe, pillars/bump and polyimide, and drive materials and BOM choices such as die thickness and mold compound to meet chip package interaction requirements.
• Drive materials characterization from both package and die components to understand chip package interaction mechanism using TMA, DMA, nanoindentation, and packaging mechanical and thermal stress stimulus.
• Drive novel solutions with silicon design and product teams to recommend the optimum package solutions to meet electrical, mechanical (1st, 2nd, and 3rd level interconnect), thermal, reliability, cost, and other system level requirements.
• Interface closely with multi-functional team that include Product Development, Wafer Level Process, Assembly, Test, Manufacturing and Global Quality and manage the product/package to mass production.

Requirements:

• Bachelor/Masters of Science in physics, materials, mechanical, chemical, or electrical engineering. MS or PhD preferred
• 5+ years of relevant experience in semiconductor manufacturing or a related field, with hands-on experience in semiconductor packaging or Frontend processes, specifically in technology on
• Appreciation for Structured Problem Solving
• Ability to interpret die-, package-, and system-level design and simulation (thermal/mechanical/electrical) methodologies and results
• Knowledge in Chip Package Interaction (CPI)
• Experience and working knowledge with 2.5D/3D heterogeneous integration technologies such as WLFO, SoIC, CoWoS, WoW, InFO, and other chiplet/SiP architectures is a plus
• Experience with wafer bumping, package assembly, substrate technology, BOM selection, testing and product development lifecycle
• Excellent communication skills with the ability to convey complex technical concepts to both technical and non-technical partners
• Demonstrated leadership experience in guiding multi-functional teams and driving technical excellence

Keen on the role? Apply now!

As a Non-Volatile Memory Quality & Reliability Assurance (NVMQRA) Engineer at Micron Technology, you will be responsible for performing formal Failure Analysis of customer reported failing devices via the Returned Material Authorization (RMA) process. You will be required to summarize lab analysis results at the electrical and physical level to identify root cause and establish an associated containment plan. In this role, you will have the opportunities to collaborate with various engineering and manufacturing stakeholders to evaluate and review Corrective Actions /Preventive Actions. You will provide documentation of the RMA findings and oversee the final customer report till closure. In addition, for the senior role, you will be asked to provide guidance and lead the team when solving complex unplanned deviations reported by our customers. Project management skills are necessary and the ability to make critical decisions that directly translate to quality and timely completion of the project is highly desirable. You will also be required to spearhead the sustaining efforts and keeping up to date on new product knowledge, as well as developing and mentoring new talents.

Responsibilities and Tasks

Perform Failure Analysis of Customer Returns

• Understand customer complaint of the memory component failure
• Initiate communication with Micron Customer-facing team for further details on customer complaint, requesting additional questions to provide best opportunity for successful analysis
• Perform bench level analysis including initial data image analyis/examination
• Perform Automated Test Equipment (ATE) analysis and interpret results
• Work with the appropriate engineering teams (e.g., PE, PYE) to perform detailed fault isolation when electrical failure has been confirmed
• Summarize findings and submit for physical failure analysis (PFA).

Provide FA Reports for Micron Customer Facing Team for Communication to External Customers

• Summarize analysis at electrical and physical level into customer friendly formats.
• Work with the appropriate manufacturing Global Quality teams through the appropriate request systems (example: GPSS) for Root Cause and/or Corrective Action and a containment plan
• Identify potential risk to external customers
• Communicate with respective BU (Business Unit) on potential impact to customers
• Communicate FA updates through interim reports or during scheduled meetings with the customers.
• Provide formal FA Report with findings

Sustain Knowledge of Device Capabilities and Characteristics

• Keep up to date with latest Fab/ASM process technology
• Understand datasheet specifications for each device and the differences from previous technode for NOR * NAND product family
• Comprehension of qualification data and potential impact to customer operation
• Stay up-to-date on common customer applications and usage model
• Partnering with customer support team to resolve ongoing customer issues

Qualifications and Experience

• Excellent verbal and written communication skills in English. The ability to communicate clearly and concisely both verbally and in writing is critical in this role.
• Good organization skills and ability to multitask and coordinate between multiple issue at any given time.
• Ability to work effectively in cross-functional teams and handle pressure situations in a professional manner
• Excellent problem-solving and analytical skills with strong attention to details.
• Familiarity with NexTest /Teradyne bench analytical tools, scripting in linux console will be an added advantage.

Candidates with 2-3 years of experience in the semiconductor industry as Product or QA engineer are preferred. Relevant experienced candidates will be considered for the Senior Role.

Education

A Bachelor or Masters Degree in Electrical Engineering or similar field of study.

As a Process Control System Engineer you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives.

As a PDE Network Engineering Process Control System (PCS) Engineer/Senior Engineer, we will be responsible to develop smart manufacturing solutions towards the Industry 4.0 standard. We will gain exposure and knowledge in many cutting-edge areas including Machine Learning, Advanced Control Solutions and Deep Learning. As a PDE PCS Engineer, we will have the opportunity to develop a complete solution that starts from requirements gathering, data analysis and modeling with big data platform, followed by system development and integration; and then network wide implementation. The work we do directly affects the bottom line of the entire company by providing scrap/excursion control, Statistical Process Control (SPC), Advanced Process Control (APC or Run-to-Run), Fault Detection and Classification (FDC), and overall enhanced process capability. We will meet regularly and team with Process areas to understand their tools, processes, and challenges and work with them to create process control models, strategies, and other methods for ensuring quality output.

Responsibilities

• We develop, implement and improve smart control solutions for optimum manufacturing performances.
• We provide technical oversight, guidance and support for process control implementation
• We conduct intensive data analysis and modeling to identify sources of variation in the process and translate it into control solutions.
• We support PDE KEG team in Classification, Characterization and Categorization and define Data Collection Requirements, Perform Integration and Setup Data Collection in E3 Environment.
• We define Analysis and setup Requirements and Setup Limits and OCAP and engage in periodic review with PCS team and network on BKM practices.
• We develop and deliver training on control systems and related topics.

Requirement

• PhD, Masters/Bachelor’s Degree in Electrical and Electronics Engineering/Computer Science/Statistics/ Mathematics/Physics
• At least 4 years of experience in semiconductor manufacturing advanced process control.
• Experience and knowledge in Programming and Data Analysis. Preferred experience in Python/R/SQL/Hadoop eco-system and/or in the development of web-based applications
• Familiar with Machine Learning.
• Good communication and interpersonal social skills.
• Excellent problem solving and analytical skills.
• Excellent verbal and written communications skills. Good interpersonal skill and a good teammate.
• Excellent Project management skills.
• Ambitious and ability to multi-task and balance dynamic priorities.
• Ability to participate in a multi-functional team environment.
• Willing and capable of international travel, as needed, to accomplish your objectives.

Keen on the role? Apply now!

As a Non-Volatile Memory Quality & Reliability Assurance (NVM QRA) Engineer at Micron Technology, you will be responsible for performing formal Failure Analysis of customer reported failing devices via the Returned Material Authorization (RMA) process. You will be required to summarize lab analysis results at the electrical and physical level to identify root cause and establish an associated containment plan. In this role, you will have the opportunities to collaborate with various engineering and manufacturing stakeholders to evaluate and review Corrective Actions /Preventive Actions. You will provide documentation of the RMA findings and oversee the final customer report till closure. In addition, for the senior role, you will be asked to provide guidance and lead the team when solving complex unplanned deviations reported by our customers. Project management skills are necessary and the ability to make critical decisions that directly translate to quality and timely completion of the project is highly desirable. You will also be required to spearhead the sustaining efforts and keeping up to date on new product knowledge, as well as developing and mentoring new talents.

Responsibilities and Tasks

Perform Failure Analysis of Customer Returns

• Understand customer complaint of the memory component failure
• Initiate communication with Micron Customer-facing team for further details on customer complaint, requesting additional questions to provide best opportunity for successful analysis
• Perform bench level analysis including initial data image analysis/examination
• Perform Automated Test Equipment (ATE) analysis and interpret results
• Work with the appropriate engineering teams (e.g., Product Engineering, Product Yield Enhancement) to perform detailed fault isolation when electrical failure has been confirmed
• Summarize findings and submit for physical failure analysis (PFA).

Provide FA Reports for Micron Customer Facing Team for Communication to External Customers

• Summarize analysis at electrical and physical level into customer friendly formats.
• Work with the appropriate manufacturing Global Quality teams through the appropriate request systems for Root Cause and/or Corrective Action and a containment plan
• Identify potential risk to external customers
• Communicate with respective BU (Business Unit) on potential impact to customers
• Communicate FA updates through interim reports or during scheduled meetings with the customers.
• Provide formal FA Report with findings

Sustain Knowledge of Device Capabilities and Characteristics

• Keep up to date with latest Fab/ASM process technology
• Understand datasheet specifications for each device and the differences from previous technode.
• Comprehension of qualification data and potential impact to customer operation
• Stay up-to-date on common customer applications and usage model
• Partnering with customer support team to resolve ongoing customer issues

Qualifications and Experience

• Excellent verbal and written communication skills in English. The ability to communicate clearly and concisely both verbally and in writing is critical in this role.
• Good organization skills and ability to multitask and coordinate between multiple issue at any given time.
• Ability to work effectively in cross-functional teams and handle pressure situations in a professional manner
• Excellent problem-solving and analytical skills with strong attention to details.
• Familiarity with NexTest /Teradyne bench analytical tools, scripting in linux console will be an added advantage.

Candidates with 2-3 years of experience in the semiconductor industry as Product or QA engineer are preferred. Relevant experienced candidates will be considered for the Senior Role.

Education

A Bachelor or Masters Degree in Electrical Engineering or similar field of study.

As a Test Engineer at MSB, you will be responsible for developing frameworks for monitoring and improving Engineering performance to plan, providing value-add engineering solutions, and driving continuous improvement projects in Test processes. You will also provide support in product test proliferation and excursion management activities.

Responsibilities and Tasks

Develop frameworks for monitoring and improve Engineering performance to plan

• Maintain knowledge of engineering plans, forecasts and targets
• Develop systems for tracking and monitoring actual performance
• Evaluate and resolve performance issues
• Drive projects to improve performance to plan

Provide value-add engineering solutions to meet cycle time improvement, cost reduction and quality performance goals

• Participate in Test cycle time, cost and quality improvement teams
• Review and evaluate variables that contribute to cycle time, cost and quality
• Develop and implement cycle time, cost and quality improvement projects

Drive continuous improvement projects in Test processes to improve operational efficiency and productivity

• Maintain Test process, equipment, systems and product knowledge
• Perform Test efficiency and productivity analysis
• Develop and implement improvement projects

Provide support in product test proliferation activities

• Activate manufacturing test readiness team
• Verify production readiness
• Perform production validation
• Ensure qualification effectiveness and efficiency

Support Quality team in excursion management activities

• Participate in Test containment and disposition activities
• Perform and verify Test disposition system set ups
• Execute and ensure timely disposition of deviation materials

Work closely with Test planning/manufacturing/engineering teams to ensure the smooth execution of Test manufacturing operations

• Participate in Test operations review discussions
• Provide tactical engineering support

Collaborate with multi-functional Central/Site teams to overcome Test operation issues and challenges

• Investigate and identify root cause of issues
• Implement corrective actions
• Design preventive measures

Job Requirements

• Bachelors /Masters in Electrical and Electronic Engineering, or related fields.
• Knowledge of semiconductor processing, device physics, and Silicon IP.
• Self-motivated, enthusiastic, and proactive.
• Proficiency in statistics, data analysis tools, problem-solving and analytical skills.
• Excellent communication and presentation skills both oral and written.
• Ability to work independently, prioritize tasks, and manage numerous projects with minimal supervision.
• Effective collaboration across departments and with external partners.
• Familiarity with Big Data Analytics, Process Automation and Generative AI Applications will be an added advantage.
• Leadership experience
• Keen and knowledge of the semiconductor Industry
• Experiences in the development, procurement, installation, and calibration of instruments, equipment, and control devices for both New Product Introduction (NPI) and High Volume Manufacturing (HVM). Experiences in managing the operational, functional, and performance testing of semiconductors and conducts Root Cause Analysis for low yield issues and analyzing and interpreting test data, and prepares technical reports and publications.

We are looking for a Package-Silicon Integration Engineer in Micron's Package Development Engineering(PDE) Group, who will be responsible for driving advanced package development for next generation silicon and package technologies. You will collaborate with various functional teams such as silicon wafer design, package design, wafer fab to meet project requirements. You will drive the technology development through multiple phases of product maturity and contribute to Micron's strategic objectives of Technology leadership.

RESPONSIBILITIES include but are not limited to:

• Work with package design and development teams to complete chip package interaction risk assessment.
• Work with scribe designers and assembly engineers to find solutions for dicing problems and implement relevant design rules/FMEA.
• Work with die designers to enable design for manufacturing in area like die size, scribe width and pad size.
• Collaborate with R&D/manufacturing wafer fabs and packaging teams to solve relevant issues, and improve yield, quality and manufacturability.
• Contribute to development of new silicon and package technologies by engaging with Micron’s internal factories.
• Define test vehicles, plan DOEs, characterize enabling technologies, document best-known-process and hand-off to manufacturing.
• Identify technology, quality, business process gaps and develop solutions.

EDUCATION, EXPERIENCE & QUALIFICATION REQUIRED

• Masters or Bachelor’s degree in Engineering (Mechanical, Materials Science, Electrical, Chemical) or related field
• 5-7 years of semiconductor fab experience in Chip package interaction and integration
• Strong Project / Program management skills
• Possess sound methodology for organizing work, decision-making and setting priorities
• Strong analytical, problem solving, and organizational skills
• Proficiency in computer applications like Excel, Word, Power Point.
• Self-motivated and team-oriented.
• Strong interpersonal, oral and written communications-skills.

Keen on the role? Apply now!

As a Process Development Engineer, you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives.

• Excellent execution on assembly process for 1st New Product Introduction (NPI) success and smooth transfer process from NPI to HVM
• Excellent execution of the qualification of NPI products / packages build that proliferate from the pilot products and packages according to planned timeline
• Full responsible on support NPI business process with process TRA, POS, PFMEA/QCP, risk mitigation and documentations.
• Deliver BIC yield and cost on product NPI with integration of DFx BIC package solution, process guideline and design rules.
• Collaboration with cross functional team from NPI to LVM/HVM process transfer.
• On-time execution of NPI Customer samples and Engineering Samples build for new products and packages

SME Process Owner Responsible for Continuous Improvement on Process Yield, Defect Elimination and Process Characterization

• Process owner to perform on-time detection with data analysis for process yield improvement. Lead the defect elimination and continue improvement action, with problem solving methodology, statistical analysis and integration solution decision.
• Process owner to develop process recipe for BIC UPH, conducting process characterization to define process parameters and boundary.
• Continuous develop in depth assembly process technical knowledge, well understand process capability/tolerance//spec limit/CpK, and utilize key tools PFMEA/QCP/APC/FDC/Alarm on assembly processes Cz/Development/NPI.
• Global leader for cross team collaboration on network BKM, process recipe spec and recipe standardization/conversion.

Technology enablement and development – Process, Material, Equipment

• Participate and support Product Roadmap, to enable key process capability and technology development to ensure packaging solution is ready prior 1st Qual Silicon deliver.
• Frequent engagement with equipment and material supplier (at least interval of monthly or daily/weekly for process issues)
• Collaboration with Supplier and involvement Supplier Roadmap (Material/Equipment/OSAT), to understand market trends and competitor’s direction, ensure key process technology and capability enablement is in-line.
• Frequent review and participant Competitor Analysis, to understand market trends and competitor’s technology/capability boundary
• Engage and follow PDE business process (TGR, TORB, KEG interlock) for new technology qualification, alignment and safe launch

Teamwork and General expectation

• Trainer/Buddy/Mentor for new team members, build effective relationships within team and cross team (peers, counterpart)
• Regularly review data and direction with supervisor. Demonstrate sound data analysis and judgment. Present reports and findings with appropriate conclusions, recommendations and decision making.
• Develop, or coordinate development of, training materials for existing/new process
• Safety Identify and promptly report hazards, follow safety procedures and area work rules including proper PPE, lockout and chemical safety.

Requirements:-

• Masters or Bachelor's degree in Mechanical/ Materials Engineering
• Experience in backend engineering process or package development preferred
• Good technical knowledge in component test and/or module manufacturing process
• Excellent data analysis, statistical analysis, data interpretation skills
• Ability to make sound data-driven decisions. Prioritize and apply due-diligence in day to day task.
• Possess analytical and problem solving skills
• Keen interest in semiconductor engineering
• Showcase leadership experience and potential

As an Engineer of MSB Lean Manufacturing, you will manage the implementation of Lean transformation methodologies and tools in Assembly, Test and SSD manufacturing at MSB. You will collaborate closely with site functional teams to identify, explore and implement lean methodologies and tools to drive improvements in throughput, labor productivity, yield, and cycle time performance.

Responsibilities:

• Lead the adoption and implementation of Lean methodologies and tools across Assembly, Test, and SSD manufacturing.
• Facilitate continuous improvement events across different functional teams (e.g., Kaizen, Value Stream Mapping (VSM), Projects, Workshops).
• Develop and sustain programs and systems to foster a Lean culture.
• Conduct labor productivity analyses (e.g., Touch-time, MMR, spaghetti charts) to enhance operator and technician efficiency and reduce operational errors.
• Oversee Utilization/ Overall Equipment Effectiveness (OEE) to identify key sources of losses and improvement opportunities.
• Collaborate with functional experts to identify areas for improvement through the application of Lean methodologies and tools.
• Propose Lean approaches and initiatives, including Kaizen and Continuous Improvement Projects.
• Act as the key integrator between central and site functional teams, developing, driving, and communicating progress on critical Lean improvement initiatives.
• Develop an overall view of critical initiatives and their impact on key performance indicators.
• Provide visibility on program status, including key achievements with clear ownership.
• Trigger interventions to ensure programs stay on track towards targets.
• Support regular reporting and meetings with senior leadership, including deep dives for weekly/monthly reports and ad-hoc senior management updates.

Requirements

• Bachelor’s /master’s in Industrial and system engineering, engineering management, Production & Operation Management, or related field.
• > 2 years of experience in Overall Equipment Effectiveness (OEE) and/or Lean manufacturing fundamentals in the semiconductor industry
• Strong project management, analytical skills and problem solving skills
• Possess good communication and interpersonal skills, with the ability to work effectively with multiple multi-functional teams.
• Knowledge of Semiconductor processes, engineering and/or manufacturing operations

Keen on the role? Apply now!

Responsibilities:

- Assess Die Overkilling In Line and Optimization of criteria

• Define Sampling Criteria for Yield Enhancement (YE) Wafer – Initial is to align with RPM lot
• Define and Create YE In Line DL2 & MRDA Flow: Full scan with tighter criteria (higher magnification) with non-die-kill
• Create Deviation flow to Route to YE Flow
• Define and Create YE Probe Flow: Full data logging and Test-to-end to capture as much data as possible
• Data Analysis:
• Correlation of MRDA (Metro Real-time defect analysis) Defect to Probe to identify in line failure mode causing probe fail and failure analysis

- Manage Risk of deviation

- Provide organizational leadership to build functional strategies & processes, and collaborate with partners to deliver strategic solutions

• Establish organizational roadmaps and strategies. Apply extensive knowledge and tenacity to carry out strategies.
• Collaborate with peers to construct global solutions.
• Ensure conflict resolution and assist with identifying escalation paths.
• Align internal strategies and communicate line of sight to corporate strategic objectives.
• Establish and communicate department capabilities to ensure partner expectations are aligned.
• Manage conflict and build effective relationships with internal and external partners.
• Initiate and sustain effective communication with internal and external partners.
• Provide advice to senior and executive management on strategic decisions
• Establishes and manages budget/finances for the team

- Ensure a Safe, Compliant, and Ethical Work Environment

• Maintain knowledge of and apply company safety, labor, and ethics policies.
• Communicate requirements and expectations to leaders and external partners.
• Ensure execution of mandatory training for organization.
• Identify and resolve and / or report potential safety, security, and labor issues.

Requirements

• Bachelors, Masters or PhD in Electrical Engineering, Materials Science, Chemical Engineering, or related field
• At least 4 years of experience in Semiconductor Manufacturing and on a leadership capacity, with focus on Advance Packaging technologies and High Bandwidth Memory (HBM) integration, in yield enhancement
• Experience in PWF (Post Wafer Fabrication), Backend engineering process, assembly package technology development and technical knowledge with die and wafer level process technology with understanding of Micron’s silicon and how it interacts at a package level through CPI (Chip Package Interaction), in yield enhancement
• Strong leadership and vision and must be able to comfortably work across organizational boundaries and geographies.
• Demonstrated ability to influence executives, senior leaders and partners on strategic decisions across multiple functions and geographies.
• Ability to effectively collaborate with multi-functional organizations to understand needs and translate them into actionable plans, deliverables, and resource requirements.
• Demonstrated ability to drive and implement a wide range of global initiatives with global teams.
• Ability to be guided by business objectives and determine best methods for delivering results.
• Organized, meticulous, and strong focus on results.
• Demonstrated ability to inspire teamwork and to effectively lead others.
• Proven facilitation skills including the ability to influence others, build consensus, and resolve conflict.
• Demonstrated track record in baseline performance improvement, business process creation, process simulation techniques, data interpretation skills and proficiency in statistical analysis/method.
• Excellent analytical skills and organizational competency
• With good oral and written English communication skill

Keen on the role? Apply now!

As a Package Design Engineer within the Package Development and Engineering (PDE) organization in Micron Technology, you will provide package definition and designs for advanced semiconductor devices. You will be working with a multi-functional team across several geographies to create package design databases such as package stack-up, simulation, route-study, substrate/lead frame layout, wire bond diagrams, and other design documentation. You will be ensure the completion of design activities within the project schedule and ensure that design outputs are within Assembly and vendor capability.

Responsibilities will include, but are not limited to:

• Conduct feasibility studies for various package options and assess designs for manufacturability and reliability.
• Work closely with multi-functional team to address packaging design challenge in the area of layout, electrical, thermal, mechanical, assembly and reliability.
• Interact with PDE assembly team and external assembly subcontractor partners to recommend package solutions to meet customer and/or market requirements
• Generate and update assembly documents in database. Provide drafting and drawing support for package drawings, interposer drawings, and manufacturing drawings.
• Support package and DFMEA reviews with assembly engineering and subcon teams.
• Support package technology development, including material selection, process development, DOEs, and related activities
• Support package technology development, including material selection, process development, DOEs (Design of Experiments), and related activities.
• Track and drive program milestones to ensure timely development execution.
• Provide design support for thermal/mechanical/electrical simulation analysis.
• Support and contribute to the Global Design, Simulation and Substrate (GDSS) team on continuous improvement efforts such as:Global design alignment activities
  Continuous improvement efforts
  Package design rules
  Package roadmaps
  Competitive Analysis review

Requirements:

• Master (preferred) or Bachelor of Science degree in Electrical Engineering or Mechanical Engineering with a minimum of 5 years of experience in semiconductor packaging industry OR PhD graduates in Electrical Engineering
• Candidates must possess a strong design knowledge of high-density (Wirebond + Flip-Chip) packaging architectures, die stack-up, packaging layout optimization.
• Excellent communication skills, both oral and written in English.
• Excellent problem solving and analytic skills.
• Experience with Cadence SIP, APD and AutoCAD software tools is preferred.
• Good understanding of Silicon IP, floorplan and Signal/Power Integrity is a plus.
• Ability to work independently, prioritize and manage numerous projects with minimum supervision.
• A global perspective and the ability to work in a multicultural environment.

Performs semiconductor design engineering assignments including engineering and designing packaging stack-up, layout checking, documenting specifications, modifying and evaluating packaging risk in the areas of electrical, thermal, mechanical and reliability. Reviews package design requirements, define the package stack-up and conduct final design review. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor Packaging.

Your main responsibilities include:

• Develop and maintain product datasheet testing and characterization test programs for NAND and NOR components
• Working with product reliability engineers to define test flows for individual products
• Provide support to operation team to ensure seamless execution for generated test flow on the tester with live product
• Perform electrical failure analysis for failure validation and characterization

You are encouraged to apply if you can demonstrate some of the qualities listed below:

• Master's or Bachelor's degree in Engineering field. Microelectronic/Electrical/Computer Engineering fields are preferred.
• Positive attitude and self-motivation towards learning and development.
• Good analytical mindset and structured personality.
• Good written and verbal communication skills.
• Hands on experience with C++/Python and Object-Oriented Programming is a plus
• Understanding Automated Test Equipment and flash memory is a plus.
• Fresh graduates are welcome to apply.

Working location:

• 990 Bendemeer Road, Singapore 339942

Responsibilities:

- Assess Die Overkilling In Line and Optimization of criteria

• Define Sampling Criteria for Yield Enhancement (YE) Wafer – Initial is to align with RPM lot
• Define and Create YE In Line DL2 & MRDA Flow: Full scan with tighter criteria (higher magnification) with non-die-kill
• Create Deviation flow to Route to YE Flow
• Define and Create YE Probe Flow: Full data logging and Test-to-end to capture as much data as possible
• Data Analysis:
• Correlation of MRDA (Metro Real-time defect analysis) Defect to Probe to identify in line failure mode causing probe fail and failure analysis

- Manage Risk of deviation

- Provide organizational leadership to build functional strategies & processes, and collaborate with partners to deliver strategic solutions

• Establish organizational roadmaps and strategies. Apply extensive knowledge and tenacity to carry out strategies.
• Collaborate with peers to construct global solutions.
• Ensure conflict resolution and assist with identifying escalation paths.
• Align internal strategies and communicate line of sight to corporate strategic objectives.
• Establish and communicate department capabilities to ensure partner expectations are aligned.
• Manage conflict and build effective relationships with internal and external partners.
• Initiate and sustain effective communication with internal and external partners.
• Provide advice to senior and executive management on strategic decisions
• Establishes and manages budget/finances for the team

- Ensure a Safe, Compliant, and Ethical Work Environment

• Maintain knowledge of and apply company safety, labor, and ethics policies.
• Communicate requirements and expectations to leaders and external partners.
• Ensure execution of mandatory training for organization.
• Identify and resolve and / or report potential safety, security, and labor issues.

Requirements

• Bachelors, Masters or PhD in Electrical Engineering, Materials Science, Chemical Engineering, or related field
• At least 4 years of experience in Semiconductor Manufacturing and on a leadership capacity, with focus on Advance Packaging technologies and High Bandwidth Memory (HBM) integration, in yield enhancement
• Experience in PWF (Post Wafer Fabrication), Backend engineering process, assembly package technology development and technical knowledge with die and wafer level process technology with understanding of Micron’s silicon and how it interacts at a package level through CPI (Chip Package Interaction), in yield enhancement
• Strong leadership and vision and must be able to comfortably work across organizational boundaries and geographies.
• Demonstrated ability to influence executives, senior leaders and partners on strategic decisions across multiple functions and geographies.
• Ability to effectively collaborate with multi-functional organizations to understand needs and translate them into actionable plans, deliverables, and resource requirements.
• Demonstrated ability to drive and implement a wide range of global initiatives with global teams.
• Ability to be guided by business objectives and determine best methods for delivering results.
• Organized, meticulous, and strong focus on results.
• Demonstrated ability to inspire teamwork and to effectively lead others.
• Proven facilitation skills including the ability to influence others, build consensus, and resolve conflict.
• Demonstrated track record in baseline performance improvement, business process creation, process simulation techniques, data interpretation skills and proficiency in statistical analysis/method.
• Excellent analytical skills and organizational competency
• With good oral and written English communication skill

Keen on the role? Apply now!

As an Manufacturing Central Team Assembly and Test Automation Project Engineer Automation Project Engineer, you are member of the Global Operations Team responsible for the worldwide portfolio of Automation projects aligned to Assembly and Test Operations objectives and corporate strategies and initiatives. You will develop, facilitate, and/or lead data-driven program management capabilities during Initiation, planning, and execution phases. You will identify risks early, manage issues, and drive initiatives to closure.

Job Responsibilities

• Collaborate with network teams - site automation, central/ site Process and Equipment Engineering, procurement, safety EHS in managing the automation projects
• Identify Project partners and manage expectations
• Identify and manage program projects dependencies
• Collect and document partner requirements
• Identify and resolve issues and conflicts
• Control project scope
• Communicate project expectations to team members and partners
• Coach, mentor, motivate, supervise, and provide recognition for projects
• Maintain project support through interaction with senior leaders
• Promote Program Management value and business practices to the organization
• Develop and deliver progress reports, proposals, requirements documentation, and presentations
• Identify potential crises, and develop and implement resolution plans
• Facilitate transition of system and business processes from project closure to long term sustainment
• Follows Company/Department Policies and Group expectations.
• Maintains a clean and safe working environment by proactively assessing the work (and surrounding) area and submitting work orders as needed.
• Recognizes and reacts to safety alarms (EES, fire alarm, MDA, etc.)
  Remains within Micron’s attendance policy.
• Displays a positive attitude toward Micron and its policies
  Holds self and other team members accountable for adherence to all company-wide safety procedures (PPE, EIPS).
• Observe all established EHS policies, requirements, and procedures.
• Understand and follow EHS guidelines included in work instructions.

Requirements:

- Bachelor's in Engineering or Science in fields such as mechanical, electrical, industrial, computer or automation.

- Minimum 3 years working experience in engineering semiconductor project management field

- Strong verbal and written communication skills

- Capability to lead teams and manage project team members

- Project Management Certifications are preferred

- Knowledge in automation, semiconductor process and systems are beneficial

- Experiences in supporting and leading global teams/projects

As a Metrology/ Real-Time Defect Analysis (RDA) Engineer in MSB, you have the opportunity to work with a multi-functional team from different areas of the plant/ process areas to understand their tools and processes so as to create measurement recipes that can provide quick and accurate feedback on the product integrity, thus ensuring quality output. As technology advances, you will be constantly challenged with the need to innovate for newer, faster and better modes of monitoring. You will collaborate closely with vendors to explore best known methods to maintain high tool performance and embark on possible ways of cost reduction to ensure our product retains its competitiveness in the market. Additionally, you are required to work in both clean/non-clean room environment

Enable production Metro/RDA needs.

• Provide first level of support for engineering requests, recipe maintenance, tool recovery and basic troubleshooting of tool issues
• Set daily priorities and enable efficient communication.
• Schedule and perform preventive maintenance on assigned tool sets
• Ensure all Special Work Requests (SWRs) are processed correctly and in a timely manner
• Optimize tool maintenance schedules and utilization
• Resolve sampling strategy to meet business requirement

Ensure all Metro/RDA tool meet measurement and inspection standards.

• Set up tool qualification criteria, implement, supervising through SPC.
• Make decisions on how to address tools and products that are out of control for established SPC rules for both process and defect related issues
• Develop and handle projects designed to reduce cost, reduce tool measurement variability, improve availability, and find solutions to ongoing problems
• Partner with Process, Equipment Owners and vendors for equipment upgrades/enhancements to improve tool performance
• Perform periodic assessment, tool-to-tool matching and GR&R, etc. to ensure tool measurement accuracy.
• Evaluation and enable next generation tool to close metrology gaps.
• Partner with the metrology/inspection tool vendors to develop new hardware, software, and technologies.
• Perform tool evaluation and buy-off

Seek and drive methodology breakthrough to improve efficiency in metro/RDA function.

• Drive process improvement through new recipe creation that helps to provide accurate and faster feedback to the line, thereby improving the confidence level of the product.
• Participate in world-wide discussions for continuous improvement on the toolset(s) assigned across Micron sites.
• Set up processes, design and implement process monitoring, control methodologies.
• Establish business process standards, specifications and documents.
• Work with peer groups to test and vet new or continuously improve the Reaction Mechanisms and Procedures based on feedback from the end users.
• Write and publish reports that summarize projects, detection capability improvements, manufacturing productivity and cost reduction work.

Requirements:

• Bachelors in engineering/science/Statistics
• More than 2 years’ experience in Metrology/RDA in Semiconductor industry
• Knowledge of semiconductor Metrology/RDA equipment and understanding of Statistical Process Control (SPC), process control and its reaction mechanism
• Strong problem solving and critical thinking skills and able to identify root causes
• Ability to facilitate meetings and achieve cross area engagement /empower a group of people toward a common goal / work and lead team project.
• Good documentation skills with strong attention to details
• Validated strong analytical and data summary skills
• Experience in MSA (Measurement System Analysis) is an added advantage
• Experience in Python and Tableau is an added advantage
• Good communication skills

Keen on the role? Apply now!

Oversees the installation, modification, upgrade and maintenance of manufacturing equipment. Maintains current records on equipment manufacturers’ technical notices, upgrades and safety issues. Studies equipment performance and reliability. Establishes programs and solutions for increasing uptime and for equipment problems that affect the manufacturing process. Provides technical support to the manufacturing equipment repair and process engineering organizations. Defines and writes preventative maintenance schedules.

As a Senior Engineer in PDE (Package Development & Engineering) at Micron, you will be responsible for the Advance Packaging success within your scope (MRDA) and guided by functional objectives, in terms of process, equipment and materials definition, development and/or optimization. You will be managing and optimizing your area's performance to meet or beat defined metrics. You will apply extensive knowledge to carry out tactics and collaborate with internal and external partners to build and implement packaging technology roadmaps aligned to corporate strategic objectives. You will provide advice to senior management related to tactical decision for the function. You will interact with executives, major customers and/or site managers to provide consultation, influence decisions and identify and resolve critical issues.

Identify, select, and evaluate new process, equipment and/or technology to support current and future requirements for MRDA area

• Define, development and establish new process, equipment design and/or capability requirements aligned to Process and Packaging Roadmap
• Develop and engage creative solution for new process, equipment capabilities and/or solution to identified constraints or future technology requirements
• Work with equipment suppliers to develop new capability
• Actively participate in Package Development Engineering activities
• Conduct equipment benchmarking to establish the equipment suppliers and platforms for current and future need
• Create decision matrix for equipment and material selection
• Generates and set-up ADC, set-up/improve recipes
• Set-up PMON, Sampling Plans, BKM, CIP Strategies & performance indicators

Installation and qualification of new equipment platform and handover to production group

• Plan/submit capital request to acquire new Equipment
• Create purchasing specification (Doc2) document
• Establish the new equipment qualification criteria and activities roadmap with respective functional team
• Establish project handover requirements and procedures upon machine qualification
• Prepare documentation for handing over with respective site owner
• Conduct data gathering for low volume production
• Conduct training for Site representatives/personnel
• Establish the feedback loop for Continuous Improvement after mass volume production

Define, improve and/or maintain a matrix of key equipment platform capability and constraints (TOR - Tool of Records) on current and new equipment platform

• Maintain and regularly update the TOR, with inputs from local or other assembly site
• Maintain general knowledge of process and material characteristics and translate to equipment design requirement
• Search continually for new equipment or suppliers with improved or new capability that is aligned to Process/Packaging need

Collaborate with production group on upgrades of existing production equipment through continuous improvement projects

• Maintain knowledge of design constraints and weakness of existing platform
• Participate in the continuous improvement projects involving equipment improvement and upgrades

Job Requirements/ Qualifications:

• Bachelor or master’s in electrical engineering, Materials Science, Chemical Engineering, or related field. A PhD is a plus.
• 4 or more years of experience with proven track record of technical leadership in semiconductor manufacturing in Metro Real-Time Defect Analysis Process & Equipment Engineering. Experience in other Front-End areas, in Post Wafer Fabrication & High Bandwidth Memory technology
• Be able to comfortably work across organizational boundaries and geographies.
• Ability to effectively collaborate with multi-functional organizations to understand needs and translate them into actionable plans, deliverables, and resource requirements.
• Demonstrated ability to drive and implement a wide range of global initiatives with global teams.
• Organized, meticulous, and strong focus on results.
• Demonstrated ability to inspire teamwork and to effectively lead others.
• Demonstrated track record in baseline performance improvement, business process creation, process simulation techniques, data interpretation skills and proficiency in statistical analysis/method.
• Excellent analytical skills and organizational competency
• With good oral and written English communication skill
• Excellent communication skills

Keen on the role? Apply now!

This role is within Package and Development Engineering (PDE) group of Micron. This is a global department with teams located in USA, Singapore, Malaysia, Taiwan, and India. As a PDPE (Package Device Product Engineer) in PDE, you will be responsible to prepare for new DRAM, NAND or MNAND products and coordinate resources, testing, and analysis over the lifecycle of the product. You will run data analysis and modelling, create, and maintain root cause analysis documentation, analyze parametric, probe level (Front End) and electrical test (Back End) data and respond to failures. In this role, you will work with various Technology Development (TD) & New Product Introduction (NPI) Engineering (Electrical Failure Analysis (EFA), Physical Failure Analysis (PFA), Assembly) and Manufacturing groups to find the root causes of the failed units.

Responsibilities and Tasks

• Enable new test signals in BE which would capture assembly related failures.
• Work with Test Solution Engineering (TSE) & Product Engineering (PE) to ensure standardize test coverages & chars. Define Char limits, and approval of any test related changes.
• Development of new out-of-control-action-plan (OCAP) and its sustenance
• Provide Lot disposition based on parametric data observation in case of out-of-control (OOC) trigger.
• Ensure that Silicon & assembly process meets Product expectations by extracting and analyzing Probe and BE test data.
• Participate in Phase Gate review meetings, presenting the data analysis and deciding on Phase Gate exits related to electrical Test data.
• Analyze test failures, coordinating EFA & PFA to identify the root cause. Implement fixes for fails (Fab process or Design or Assembly Process)
• Finding out the correlation of test failures to assembly process and updating the database with the signatures observed
• Support Global and Local material review board (MRB) in case of excursions and RMA related to package intrinsic design. This includes analyzing electrical test data for root cause analysis (RCA) and assessing the health of the contained material.

Requirements

• Bachelors/ Masters in Electronics, Device Physics, Applied Physics, Electrical
• Sound knowledge of device physics
• Knowledge in Engineering Statistics
• Experience in data (electrical) analysis and modelling (JMP, Spotfire is a plus)
• Experience in programming (Python or Perl)
• Effective communication skills in written and spoken English
• Good multitasking and organizational skills, able to make decisions in complex situations
• Excellent problem solving and analytical skills
• Experience in NAND / DRAM memory or related field
• Knowledge in semiconductor packaging assembly processes
• Experience in fabrication processes, electrical characterization techniques, metrology techniques

As a Senior Package Design Engineering (PDE) Central Engineering System and Analytics (CESA) Engineer, you will develop integrated solutions to empower Backend Operations to make data-driven and heuristics-based decisions. You will work across Global Operations and sites to improve Cost, Scale, Quality, and Cycle Time by defining and designing data architecture and collaborating with key partners.

Responsibilities

• Yield Enhancement (YE) lots analysisLead YE lot analysis including reconstructing fuse identififaction (FID) for traceability, statistic comparison for different group
  
• Yield modelling / pareto benchmarkingIdentify actionable opportunities from YE lots
  Develop and improve Yield Models for HBM
  Periodically improve models based on actual performance
  
• Best Known Methods (BKM) DeploymentDevelop BKM’s for YE and drive implementation
  Identify/align BKMs and monitor implementation
  Works with different teams in the identification of critical metrics

Requirements:

• PhD/Masters/Bachelors in Statistics, Mathematics, or a related field; advanced degree preferred.
• Minimum of 3 years of experience in semiconductor manufacturing or related fields
• Preferably with experienced in Package Design Engineering and Yield Enhancement
• Strong understanding and knowledge of semiconductor manufacturing processes and technologies.
• Proficiency in statistical/machine learning and statistical techniques skills will be additional advantageous;
• Experience in MRDA will be a plus
• Proven ability to make decisions, multi-task, and solve problems and address root causes.
• Exhibit critical thinking to see opportunities.
• Effective communication skills in verbal/written.
• Self-motivated. Able to work independently with minimal supervision.
• Able to travel as required to support department and company objectives.