Total 738 research officer job vacancies in Singapore

Job Description

• Handling incoming and outgoing calls pertaining to residents' queries / feedback;
• Assist in cases creation in the system;
• Follow up with residents on the progress of the cases that have been attended by the estate team or other department (case by case) prior closing it in the system;
• Liaise with other team members from other departments pertaining to the feedback or queries cases;
• Any other duties assigned by the supervisor.

Job Requirements

• Must possess clear speaking voice and strong verbal communication skills;
• Proficient in English and/or other language / dialect to converse effectively with residents in Singapore;
• IT savvy;
• Able to work independently and also a team player;
• Fresh graduates with no work experience are welcome to apply as training is provided;
• Working Hours :4 Weekdays between Mondays to Fridays either 8am to 1230pm (for AM shift) OR 1230pm to 5pm (for PM shift) including 1 OFF day and Every Saturdays: 8am to 1pm.

Only shortlisted candidates will be notified.

The aim of Technology Development & Commercialization (TD&C) department is to drive the development of budding technologies from SERI’s research projects, push the commercial development of current research collaborations with industry and actively promote such partnerships with new partners. The TD&C office serves as a one-stop support entity for all technology development, technology transfer and industry engagements.

The TD&C office serves as the programme office for strategic research collaborations with industrial partners. The Executive/Senior Executive will be an integral part of the programme’s team and support the large collaborations by facilitating critical aspects of the programme such as:

1. Programme and Project Management
2. Grant Management
3. Research Meeting Coordination
4. General Administration

KEY RESPONSIBILITIES:

1. Programme and Project ManagementMaintain overview of all key programme activities and operations
   Support project team meetings (internal and external)
   Liaise with project leads/members and HR, Finance, Procurement, IT, Admin, etc. as necessary
   
2. Grant ManagementMaintain relevant programme grant documents
   Provide support in collating and checking of grant documentation and processes (e.g., proposal, reporting, variation requests, fund requisitions, etc.)
   Check approved project budgets and reconcile these back against the posted transactions to ensure expenditures are allowable, allocable, and reasonable
   
3. Research Meeting CoordinationConvene meetings (coordinate meeting dates and agenda, coordinate logistics)
   Drive pre-meeting preparations (identify materials required, circulate pre-meeting materials)
   Facilitate Joint Research Committee meetings (support meeting proceedings, prepare minutes)
   Coordinate post-meeting follow-ups (track action items and follow up on implementation as necessary)
   
4. General AdministrationMaintains in-depth awareness of SERI admin and grant policies related to responsibilities
   Coordinates general administration for the programme’s teams (overseas visitor meetings, internal meetings)
   
5. Takes on additional responsibilities and projects as assigned

Education/Experience requirements:

• Degree with at least 3 years’ relevant working experience, preferably in a healthcare setting and grant / programme management
• Understanding of the local healthcare sector, as well as public grant funding and grant management preferred
• Experience working with industry partners and overseas collaborators preferred but not mandatory
• Expertise in use of MS Office (word, excel, PowerPoint etc.) and related software is a requirement

Other criteria:

• Strong track-record in project management
• Able to think and function independently, and possesses critical thinking skills to accurately assess challenges and propose workable solutions to mitigate any identified risks
• Excellent written and oral communications skills

Note: Remuneration Package will commensurate with qualifications and working experiences.

Colorectal cancer (CRC) is the third most common cancer globally. Development of therapeutic strategies targeting novel cell types is the need of the hour for CRC treatment. We are looking for candidates keen on working at the intersection of cancer biology, imaging, spatial omics and computational biology to correlate results from cutting-edge technologies to clinical outcome of colorectal cancer (CRC). They should be comfortable working in a highly collaborative, multidisciplinary environment that includes biologists, imaging technologists, pathologists and medical oncologists. This will be a unique opportunity to work on new data types and ask new questions in the rapidly growing field of spatial multi-omics.

Requirements

• PhD (in final year or thesis submitted) in Life Sciences with expertise in cancer biology, immunology, or related fields
• Experience with analysis and interpretation of single-cell and spatial omics data
• Strong communication skills
• The ability to work closely with clinicians and computational biologists

To apply, please email your CV and names of references to [email protected], [email protected]

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Job Description:

We are looking for talented and highly motivated candidate to work on the research and development of flat optics. The recruited scientist will work in the National Semiconductor Translation and Innovation Centre (NSTIC), managed by A*STAR.

The candidate should have a solid background and hands-on experience in the research of optics. Candidate shall be able to perform independent research and solve challenging problems together with the team to deliver high impact results.

The main work scope of the position is as follow:

· Design and simulation of flat optics, including using machine learning method.

· Micro-nanofabrication of flat optics and their characterization.

· Technology development and translation to industry applications.

Job Requirements:

· PhD in Physics or Optics, Photonics, Electrical Engineering, Materials Science with at least 5 years of relevant experience

· Hands-on experiences on flat optics or metaoptics are added advantages.

· Good team player, resilient in tackling challenge, effective communication ability.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

We are seeking a highly skilled High-Speed IO Modeling designer to join our team. The ideal candidate will have a strong background in Electrical or Computer Engineering (Masters/PhD) , with a focus on high speed circuit modeling, statistical analysis, jitter analysis, digital signal processing, and signal integrity. The successful candidate will play a crucial role in developing IO performance models for chiplet-based high-speed communication protocols and generating complete high-speed link performance matrices based on advanced packaging.

Key Responsibilities:

• Develop IO performance models (Tx, Rx) for chiplet-based high-speed communication protocols such as UCIe, AIB, and others.
• Create complete high-speed link models by integrating IO performance models with advanced packaging interconnects.
• Generate comprehensive high-speed link performance matrices, considering various parameters such as technology node, area, latency, power, number of channels, micro bump pitch, and frequency of data rates.
• Collaborate with cross-functional teams to ensure the successful integration of IO performance models into the overall system design.
• Develop parameterised PDN model and fluent in analysing SI and PI simulations
• Stay up-to-date with the latest advancements in high-speed IO modelling techniques and technologies, and apply this knowledge to improve existing models and develop new ones.

Required Qualifications:

• Master's degree in Electrical or Computer Engineering with 2+ years of relevant experience, or a PhD in Electrical or Computer Engineering with 1+ years of relevant experience.
• Strong understanding of package/interconnect/I-O modelling, statistical analysis, jitter analysis, digital signal processing, and signal integrity.
• Experience in mixed-signal circuit design for High-Speed IOs (e.g AIB, AXI, UCIe).
• Proficiency in IBIS-AMI specification and model creation using Keysight ADS.
• Programming and scripting skills in one or more of the following: Python, Perl, C/C++, TCL, or AEL.

Preferred Qualifications:

• Ability to develop and implementing high-speed IO performance models using industry-standard tools/methodologies.
• Experience with advanced packaging technologies and their impact on high-speed link performance.
• Strong problem-solving skills and the ability to think creatively to overcome technical challenges.
• Excellent communication and collaboration skills, with the ability to work effectively in a team environment.

ROLE:
A*STAR-IME is leading the way in establishing industry first 200mm open Silicon Carbide (SiC) R&D program. The program specific focus is on advancing 200mm SiC technologies in key areas such as epitaxy, gate stack, ion implantation, and dry etching, and integrating these modules to fabricate high-performance power devices. Our objective is to drive innovation in power device research, particularly in power MOSFETs rated above 1.2KV. Developing key innovative process is crucial for creating high-performance devices that will contribute to advancements in automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. This role involve growing leadership into ion implantation processes for p-body, channel, guard ring, source contact, and other components. We are currently seeking such individual with ~5 years of experience in ion implantation. The chosen candidate will be responsible for independently supervising ion implantation processes, conducting ion implant simulations, possessing knowledge of crystallography and ion interaction with atoms, having strong understanding of implanters and related thermal processing physics, beam optics, dosimetry systems, and vacuum technology. The ideal candidate should also be willing to collaborate with various departments, the technology development group, and customers. Furthermore, the candidate will contribute to the wide-bandgap team by sharing the ion implantation expertise on compound semiconductor materials and collaborate with other departments working with Si-based technology. The candidate will also be groomed to lead this diffusion process module group of ~6 headcounts into the future.

RESPONSIBILITIES:

• Diagnose malfunctions and using test equipment & software to test faulty tool; applying knowledge of the functional operation of the ion implant equipment

• Support on-site ion implanters in creating, running & characterizing recipes for recipe validation and develop process to achieve the desired dopant profile with excellent
damage recovery.

• Collaborate with vendors to optimize equipment performance and reduce tool downtime

• Analyze data related to implant-related defects formation with quantification and defects minimizations strategy

• Examine work-orders and communicates with equipment operators to resolve equipment problems & determine mechanical and human errors contributed to the issues

• Perform scheduled preventive maintenance tasks with tool operators, especially in checking, cleaning, repairing, detecting and preventing problems

• Responsible for designing experiments for ion implantation at various dose, energy, tilt, and twist levels

REQUIREMENTS:

• Ms/PhD Degree in Electrical Engineering or related field

• >3-5 years industrial experience for high power device design and modeling

• Extensive proficiency in medium to high energy/current ion implantation processes, including a comprehensive knowledge of implant equipment, equipment parts, and
troubleshooting techniques to minimize equipment downtime

• Good understanding of wide bandgap semiconductor materials and their corresponding dopant species

• Expertise in ion channeling, ion bombardment, and their impact on the implant species profile

• In-depth comprehension of defect formation and annihilation processes in the implanted region of semiconductors

• Familiarity with essential device properties resulting from ion implantation

• Adept at mentoring and transferring knowledge to junior staff members

As part of IME Integrated Circuit Design and System Department, we are looking for a candidate with relevant experience in ultrasound imaging system design. This candidate will define an ultrasound transducer array beamformer IC architecture for imaging applications. The candidate will work closely with MEMS team on system architecture, circuit design, simulation, validation, and integration.

Role & Responsibilities

• Perform system-level beamformer architecture, design, and simulation, to derive circuit-level design specifications.
• Beamforming array optimization using AI algorithms.
• Design and implementation of beamformer algorithm in hardware.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Good understanding of ultrasound imaging systems and beamforming theories.
• Knowledge of AI algorithms and implementation will be a plus
• Familiar with IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

Job Description:

• Be a member of the leadership team to achieve the vision and mission of the National GaN Technology Centre (NGTC).
• Lead the Technology, Engineering and Industry team in technology road mapping and R&D pathfinding in device architecture, fabrication process technology, and MMIC design.
• Lead the Technology team, which comprises (a) characterization & modelling, (b) MMIC design, testing & model validation, (c) device failure and reliability analysis, (d) ultra high frequency GaN-on-SiC device design, layout, fabrication and characterization, and (e) low voltage GaN-on-Silicon device design, layout, fabrication and characterization.
• Coordinate with the Engineering team to develop ultra high frequency devices, ultra low voltage devices, and their MMICs.
• Coordinate with the Engineering and Operations teams to ensure timely delivery of the projects.
• Initiate and secure research grants and industry funding.
• Initiate, coordinate and manage research collaborations with IHLs and industry partners.
• Provide regular progress report of the Technology team’s activities to NGTC management.
• Represent NGTC in customer meetings.

Requirements:

• PhD in Electrical & Electronic Engineering, Materials Science and Engineering, Microelectronics Engineering, or closely related fields are welcome to apply.
• Deep understanding of GaN-HEMT device physics and GaN-based MMICs.
• At least 12 years of post-PhD hands-on experience in GaN HEMT and MMIC technology development including design, characterization (e.g. DC, small-signal and load-pull measurement), and modelling; preferably in RF GaN-on-Silicon or GaN-on-SiC technologies.
• At least 12 years of experience in leading a team of research engineers/scientists in managing multiple projects.
• Candidates with industry experience in GaN related R&D would be preferred.
• Working knowledge and hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, problem-solving methods, and in-line metrology techniques is desired.
• Possess strong leadership, project management, interpersonal and oral/written communication skills.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Scientist/Senior scientist will be part of heterogeneous integration group focused on development of the quantum packaging technology platforms to integrate qubit and control chip on superconductivity interposer.

He/she will work with cross functional team to:

• Design and simulation of superconducting circuits for salable quantum processor in 3D flip-chip architecture.
• Explore and develop superconducting nanowire base photo detector.
• Design and layout of circuits components of a superconducting qubit.
• Develop design rules and PDK for quantum packaging technologies.
• Provide quantum packaging solutions to meet the system requirements based on the simulation results.
  Prepare competitive grant research proposals and lead execution of these proposals.
  Engage industry partners to align and develop the building blocks required for next generations quantum packaging platforms.

Job Requirements:

• Master/PhD in quantum computing; Electrical and Computer Engineering; Material science area
• 4 to 5 years’ experience in superconducting circuits design and simulation for scalable quantum processor. Deep understanding on 3D quantum package
• Working experience on measuring loss and dielectric constants of materials at cryogenic temperatures
• Strong communication, industry awareness, and problem-solving skills.
• Highly motivated to succeed, a self-starter who is driven and able to work with others effectively to get things done.

ROLE:
A*STAR-IME is leading the way in establishing industry first 200mm open Silicon Carbide (SiC) R&D program. The program specific focus is on advancing 200mm SiC technologies in key areas such as epitaxy, gate stack, ion implantation, and dry etching, and integrating these modules to fabricate high-performance power devices. Our objective is to drive innovation in power device research, particularly in power MOSFETs rated above 1.2KV. Developing key innovative process is crucial for creating high-performance devices that will contribute to advancements in automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. This role involve growing leadership into ion implantation processes for p-body, channel, guard ring, source contact, and other components. We are currently seeking such individual with ~5 years of experience in ion implantation. The chosen candidate will be responsible for independently supervising ion implantation processes, conducting ion implant simulations, possessing knowledge of crystallography and ion interaction with atoms, having strong understanding of implanters and related thermal processing physics, beam optics, dosimetry systems, and vacuum technology. The ideal candidate should also be willing to collaborate with various departments, the technology development group, and customers. Furthermore, the candidate will contribute to the wide-bandgap team by sharing the ion implantation expertise on compound semiconductor materials and collaborate with other departments working with Si-based technology. The candidate will also be groomed to lead this diffusion process module group of ~6 headcounts into the future.

RESPONSIBILITIES:

• Diagnose malfunctions and using test equipment & software to test faulty tool; applying knowledge of the functional operation of the ion implant equipment

• Support on-site ion implanters in creating, running & characterizing recipes for recipe validation and develop process to achieve the desired dopant profile with excellent
damage recovery.

• Collaborate with vendors to optimize equipment performance and reduce tool downtime

• Analyze data related to implant-related defects formation with quantification and defects minimizations strategy

• Examine work-orders and communicates with equipment operators to resolve equipment problems & determine mechanical and human errors contributed to the issues

• Perform scheduled preventive maintenance tasks with tool operators, especially in checking, cleaning, repairing, detecting and preventing problems

• Responsible for designing experiments for ion implantation at various dose, energy, tilt, and twist levels

REQUIREMENTS:

• Ms/PhD Degree in Electrical Engineering or related field

• >3-5 years industrial experience for high power device design and modeling

• Extensive proficiency in medium to high energy/current ion implantation processes, including a comprehensive knowledge of implant equipment, equipment parts, and
troubleshooting techniques to minimize equipment downtime

• Good understanding of wide bandgap semiconductor materials and their corresponding dopant species

• Expertise in ion channeling, ion bombardment, and their impact on the implant species profile

• In-depth comprehension of defect formation and annihilation processes in the implanted region of semiconductors

• Familiarity with essential device properties resulting from ion implantation

• Adept at mentoring and transferring knowledge to junior staff members

Role & Responsibilities:

• Responsibilities include diagnosing appropriate levels of metal/metal-alloy contaminations by oxygen and other contaminants; determining the root cause of contaminants, and establishing protocols for characterizations.
• Hands-on providing support for onsite metal PVD, including creating, running, and characterizing recipes to achieve the lowest resistances.
• Collaborates closely with equipment vendors and device engineers to optimize the metal-stack for device performances and robustness/reliability, from low to high temperatures.
• Lead data analysis related to implant-induced defects and cleaning issues on metal contacts with solutions development.
• Examines the work-functions of metal/metal-alloys suitable for Ohmic contact on SiC.
• Responsible for designing experiments for Ohmic contact on various SiC substrates with different doping types, determining their impact, and resolving issues to achieve the lowest specific contact resistances.
• Designing cleaning processes to obtain ideal Schottky diode using various metal/metal-alloys on SiC for high-performance applications.
• Work closely with cross-departmental and integration teams and in 3-5 years’ time develop a WBG backend process integration team of at least 4 persons.

Requirements:

• PhD Degree in Material Science, Physics, Electrical Engineering or related field.
• >8 years related industrial experience inclusing backend process module integration.
• Extensive hands-on experience in PVD (Physical Vapor Deposition) processing for metal depositions and interface tuning.
• Strong understanding of metal-semiconductor contact physics.
• Expertise in work-function tunings of metal and metal-alloy.
• Proficiency in modulating electron affinity through implantation or surface treatments of semiconductors.
• Familiarity with wide band-gap semiconductor materials and their interaction with metal/metal-alloys at various temperatures.
• Thorough fundamentals in Ohmic contact and Schottky diode physics, as well as the impact of defects and contaminations on electrical properties.
• Skilled at mentoring and transferring knowledge to junior staff members.
• Excellent communication skills to effectively address customers' needs, concerns, and solution requirements.

Position:

Our team is starting an exciting project to develop RF/mm-wave ICs for the future of communication for Beyond-5G to 6G applications. We are looking for an exceptional candidate with relevant expertise to join us. Our team focuses on developing communication modules for both terrestrial and non-terrestrial needs. You will work at the Institute of Microelectronics (IME) to create the most advanced semiconductor technologies. You will collaborate with world-leading industries and academic institutions on innovative designs and strategic intellectual properties.

Job Responsibility:

• Benchmarking with datasheets, prior arts, and latest academic work.
• In-depth design and analysis with electrical/electromagnetic simulations.
• In-depth analysis of design robustness, optimization, and testability.
• In-depth presentations and report recording of design, layout, test and measurement, and fault analysis.
• Working independently, as a team, and with collaborators from industry and academic backgrounds.

Pre-requisites:

• A Master’s / PhD Degree in Electronics or Electrical Engineering and proven academic and industry experience are pluses.
• Experienced in designing RF/mmWave such as LNA, mixer, PA, buffer, transmission line, baluns, PLL, VCO, etc.
• Experienced in designing base-band/mixed-signal circuits, such as amplifiers, bandgap, ADC, DAC, etc., is a plus.
• Knowledgeable in design trade-offs at the circuit-level specification.
• Experienced in designing in CMOS and SiGe technology or any other technologies like RF-SOI and compound-semiconductor is a plus.
• Proficient in using Cadence and EM tools like ADS for EM circuit simulation, IC layout, LVS, and DRC verification.
• Familiarity with IC measurement and debugging and hands-on experience with RF/mmWave equipment such as spectrum analyzer, network analyzer, oscilloscope, and probe station.
• Good publication record with a strong awareness of state-of-the-art.
• Good communication and teamwork.

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

Job Description

The Engineer will be responsible for driving electro-mechanical product development in compliance with ISO 13485 standards across multiple levels, from component to product. The role includes planning and monitoring New Product Introduction (NPI) programs, managing engineering changes, and maintaining documentation, including Design History Files. The position requires close coordination with both internal and external suppliers, adhering to Quality Management System and regulatory standards.

Key Skills and Experience:

• Bachelor degree in Mechanical Engineering with 3+ years in electro-mechanical systems.
• Technical proficiency in optimizing designs for mechanical and electro-mechanical systems.
• Solid understanding of metal and plastic manufacturing processes for product design.
• Proficiency in 3D CAD software (e.g., SolidWorks), including GD&T and kinematic calculations.

Attributes:

• Analytical and detail-oriented, with a collaborative and hands-on approach.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Purpose of Job

This position is responsible for the tactical planning and lead the development of facilities / asset management strategy in support of the workspace (research and office) needs.

Central to it is to formulate master plan of space needs, infrastructure renewal, build development, market and financial analysis strategies, conceptualize and engage stakeholders and users to co-develop a workplace which is financially and environmentally sustainable.

Oversee all space projects in accordance with the approved scope, quality, budget and schedule, and a seamless transition into daily operations.

Key Accountabilities:

Strategic Planning: Develop long-term space plans and utilization strategies for portfolio of A*STAR’s space, considering factors such as research needs, future growth projections.

Development and Project Management: Lead strategic new construction and remodelling activities in accordance with the A*STAR long-term space plans and ensure excellent financial, quality and schedule outcomes. Responsible includes quality assurance and safety inspections and efficient response to work delays, emergencies and other project disruptions.

Lead the consolidation and harmonization of the different space users’ requirements and conduct technical feasibility analysis for all space projects to facilitate decision-making. Support the overall budget request process and required procurement process. Lead the construction project within the define scope, quality, budget and schedule.

Responsible to consolidate and validate all actual design specifications with the planning team and equipment manuals with the FM team as part handover. Provide support to the FM team at the initial stage of operations and DLP.

Compliance and Regulations: Ensure that all space planning initiatives comply with building codes, regulations, and industry standards across different locations. Conduct detailed assessments of multiple sites owned by A*STAR, understanding the layout, structural nuances, and potential for optimization across various locations.

Stakeholder Management & Implementation: Collaborate with facility team, and stakeholders/ users at each site to understand specific needs, align on objectives, and ensure smooth implementation of space plans.

Enable to lead technical negotiations with landlord representatives for most favourable infrastructure provision that is no lesser than market average.

Space Standardization: Develop and implement standardized space plans or design guidelines across multiple sites to ensure consistency in space norms and functionality while accommodating specific building requirements.

Optimization & Cost Management: Identify opportunities to optimize space, reduce inefficiencies, and improve overall space utilization across multiple properties. Balancing design improvements or renovations with cost-effectiveness, ensuring that space planning initiatives align with the budgetary considerations.

Value-engineering: Identify opportunities to introduce new technologies to increase equipment efficiencies aim to reduce initial investments or maintenance cost. Balancing future design requirements while ensuring that space planning initiatives align with the budgetary considerations.

Performance Evaluation: Track and evaluate the performance of implemented space plans, gathering feedback, and adjust continuously improve space utilization and yet meet research needs.

Job Requirements:

· Possess at least 15 years or more of relevant experience in either construction management and / or asset portfolio management related fields

· Background in Civil or Mechanical Engineering, being a Registered Professional Engineer with at least 7 years of experience in managing Biosafety Level Laboratory (R&D) space planning and development.

· Knowledge of construction methods and technologies and ability to interpret technical drawings and contracts

· Knowledge of local building-code and construction process

· Ability to manage multiple projects simultaneously

· Able to work under pressure and adapt to changes within a fast-paced environment.

· A self-driven and meticulous individual who has the strong ability to multi-task.

Position:

Our team is starting an exciting project to develop RF/mm-wave ICs for the future of communication for Beyond-5G to 6G applications. We are looking for an exceptional candidate with relevant expertise to join us. Our team focuses on developing communication modules for both terrestrial and non-terrestrial needs. You will work at the Institute of Microelectronics (IME) to create the most advanced semiconductor technologies. You will collaborate with world-leading industries and academic institutions on innovative designs and strategic intellectual properties.

Job Responsibility:

• Benchmarking with datasheets, prior arts, and latest academic work.
• In-depth design and analysis with electrical/electromagnetic simulations.
• In-depth analysis of design robustness, optimization, and testability.
• In-depth presentations and report recording of design, layout, test and measurement, and fault analysis.
• Working independently, as a team, and with collaborators from industry and academic backgrounds.

Pre-requisites:

• A Master’s / PhD Degree in Electronics or Electrical Engineering and proven academic and industry experience are pluses.
• Experienced in designing RF/mmWave such as LNA, mixer, PA, buffer, transmission line, baluns, PLL, VCO, etc.
• Experienced in designing base-band/mixed-signal circuits, such as amplifiers, bandgap, ADC, DAC, etc., is a plus.
• Knowledgeable in design trade-offs at the circuit-level specification.
• Experienced in designing in CMOS and SiGe technology or any other technologies like RF-SOI and compound-semiconductor is a plus.
• Proficient in using Cadence and EM tools like ADS for EM circuit simulation, IC layout, LVS, and DRC verification.
• Familiarity with IC measurement and debugging and hands-on experience with RF/mmWave equipment such as spectrum analyzer, network analyzer, oscilloscope, and probe station.
• Good publication record with a strong awareness of state-of-the-art.
• Good communication and teamwork.

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

Job Description:

We are looking for talented and highly motivated candidate to work on the research and development of flat optics. The recruited scientist will work in the National Semiconductor Translation and Innovation Centre (NSTIC), managed by A*STAR.

The candidate should have a solid background and hands-on experience in the research of optics. Candidate shall be able to perform independent research and solve challenging problems together with the team to deliver high impact results.

The main work scope of the position is as follow:

· Design and simulation of flat optics, including using machine learning method.

· Micro-nanofabrication of flat optics and their characterization.

· Technology development and translation to industry applications.

Job Requirements:

· PhD in Physics or Optics, Photonics, Electrical Engineering, Materials Science

· Hands-on experiences on flat optics or metaoptics are added advantages.

· Good team player, resilient in tackling challenge, effective communication ability.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Roles and Responsibilities:

• TCAD modeling, simulation, and innovative design of high power electronics devices, as well as device characterization.
• Develop and simulate high power SiC MOSFETs (planar, trench, Super-Junction MOSFET, IGBT) with a blocking voltage exceeding 1.2K using the industry-standard Synopsys/Silvaco simulator.
• Create and simulate practical & efficient junction terminations.
• Model transport and carrier scattering in devices operating under extreme ambient conditions.
• Serve as a valuable resource for colleagues with lesser TCAD power electronics experience and take lead in group projects with managing risks & resource requirements.
• Foster close collaborations with both internal and external customers to fully understand customer issues and requirements.

Job Requirements:

• PhD Degree in Electrical Engineering or related field.
• >2-3 years industrial experience for high power devices design and modeling.
• Thorough understanding of different types of high-voltage, high-power MOSFETs including Planar, Trench, Super-Junction MOSFETs, and IGBTs, with a focus on design and device characterizations.
• Hands-on skill in designing MOSFET/diode layouts.
• Excellent communication skills to effectively engage with customers, address their needs, resolve issues, and meet demands.

Join the Institute of Microelectronics (IME) to be immersed in cutting-edge semiconductor research. As a research institute within the Agency for Science, Technology and Research (A*STAR), IME bridges the gap between academia and industry. Our mission is to accelerate innovation in advanced packaging, piezoMEMS, SiC, RF/mmwave GaN, and photonics & sensors, and to develop talent and inspire in Singapore.

We are looking for a passionate individual to lead our Technology-Business Development (Tech-Biz) department. You will be responsible for leading the department to define and implement our strategies for technology-business development, account management, sales and marketing, and ecosystem development. If you"re excited about the future of microelectronics and wish to contribute to the development of Singapore’s innovation engine for microelectronics, we want you on our team!

Job Responsibilities

• Technology-business Development: Lead the department to define and develop strategies for technology translation.
• Customer Relationship Management: Lead the department to win and retain industry partners and customers for high-value and sustainable engagements.
• Sales: Collect, maximise leads and close customer collaboration projects.
• Marketing: Develop and execute marketing strategies to promote IME’s research capabilities to the industry. Represent IME at international conferences and exhibitions.
• Collaborate with Technology Development (TD) Teams: Partner with our "Technology Development" teams to craft robust value propositions for the industry and shape IME’s ‘go-to-market’ strategy. Detect, track and provide market trends and needs for the TD teams.
• Ecosystem Development: Liaise, coordinate and engage effectively with key internal stakeholders, including A*STAR’s Industry and Enterprise Group, other economic agencies and public sector agencies, to align efforts and achieve common goals for the Singapore semiconductor ecosystem.

Job Requirements:

• Degree in Science or Engineering.
• At least 10-15 years of relevant work experience.
• Able to structure and negotiate collaboration agreements.
• Strong communication (written and verbal), marketing and interpersonal skills.
• Strong analytical skills.
• Results oriented, pro-active, and a team player.
• Adaptable and comfortable working in a fast-paced and fast-changing environment.
• Passion to develop Singapore’s semiconductor industry.

The National Quantum Federated Foundry (NQFF), hosted at the Institute of Materials Research and Engineering (IMRE), part of the Agency for Science, Technology, and Research (A*STAR), is looking for a research scientist who is experienced in RF electronics simulations and design. The successful candidate will be part of a team of research scientists and engineers working on devices and hardware for quantum technologies, including superconducting qubits, resonator systems, opto-electronic and photonics devices, control systems, and so on. The work in NQFF will support local and international efforts to develop and translate quantum technologies to realize exciting real-world applications.

The roles of the successful candidate will include:

• Design and simulation of electrical and opto-electronic devices for quantum technologies
• Assist the formulation of device fabrication and testing plans
• Operation and maintenance of simulation software and workstations
• Analysis and presentation of scientific results

Job requirements:

• PhD degree in physics, applied physics, electrical engineering, material science & engineering, or any other relevant disciplines.
• At least more than 10 years of relevant experience
• Experience in RF hardware/electronics simulations and design
• Familiarity with superconducting qubit design and cryogenic devices is highly desired
• Expertise in simulation software (COMSOL, HFSS, etc) and scripting/programming
• Ability to independently plan and execute research work
• Ability to communicate well and work closely with team members

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Role & Responsibilities:

• Responsibilities include diagnosing appropriate levels of metal/metal-alloy contaminations by oxygen and other contaminants; determining the root cause of contaminants, and establishing protocols for characterizations.
• Hands-on providing support for onsite metal PVD, including creating, running, and characterizing recipes to achieve the lowest resistances.
• Collaborates closely with equipment vendors and device engineers to optimize the metal-stack for device performances and robustness/reliability, from low to high temperatures.
• Lead data analysis related to implant-induced defects and cleaning issues on metal contacts with solutions development.
• Examines the work-functions of metal/metal-alloys suitable for Ohmic contact on SiC.
• Responsible for designing experiments for Ohmic contact on various SiC substrates with different doping types, determining their impact, and resolving issues to achieve the lowest specific contact resistances.
• Designing cleaning processes to obtain ideal Schottky diode using various metal/metal-alloys on SiC for high-performance applications.
• Work closely with cross-departmental and integration teams and in 3-5 years’ time develop a WBG backend process integration team of at least 4 persons.

Requirements:

• PhD Degree in Material Science, Physics, Electrical Engineering or related field.
• >8 years related industrial experience inclusing backend process module integration.
• Extensive hands-on experience in PVD (Physical Vapor Deposition) processing for metal depositions and interface tuning.
• Strong understanding of metal-semiconductor contact physics.
• Expertise in work-function tunings of metal and metal-alloy.
• Proficiency in modulating electron affinity through implantation or surface treatments of semiconductors.
• Familiarity with wide band-gap semiconductor materials and their interaction with metal/metal-alloys at various temperatures.
• Thorough fundamentals in Ohmic contact and Schottky diode physics, as well as the impact of defects and contaminations on electrical properties.
• Skilled at mentoring and transferring knowledge to junior staff members.
• Excellent communication skills to effectively address customers' needs, concerns, and solution requirements.

Scientist/Senior scientist will be part of heterogeneous integration group focused on development of the quantum packaging technology platforms to integrate qubit and control chip on superconductivity interposer.

He/she will work with cross functional team to:

• Design and simulation of superconducting circuits for salable quantum processor in 3D flip-chip architecture.
• Explore and develop superconducting nanowire base photo detector.
• Design and layout of circuits components of a superconducting qubit.
• Develop design rules and PDK for quantum packaging technologies.
• Provide quantum packaging solutions to meet the system requirements based on the simulation results.
  Prepare competitive grant research proposals and lead execution of these proposals.
  Engage industry partners to align and develop the building blocks required for next generations quantum packaging platforms.

Job Requirements:

• Master/PhD in quantum computing; Electrical and Computer Engineering; Material science area
• 4 to 5 years’ experience in superconducting circuits design and simulation for scalable quantum processor. Deep understanding on 3D quantum package
• Working experience on measuring loss and dielectric constants of materials at cryogenic temperatures
• Strong communication, industry awareness, and problem-solving skills.
• Highly motivated to succeed, a self-starter who is driven and able to work with others effectively to get things done.

ROLE:

IME A*Star is currently working on establishing a hybrid fabrication platform for 150mm & 200mm Silicon Carbide (SiC) power MOSFETs as part of the new SiC R&D program. The main objective of this program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration for various types of power MOSFETs and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, with a specific focus on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this deputy lead for wide-bandgap device integration role include the development and integration of several modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, ohmic contact formation etc are essential. We are actively looking for individual with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, device layout design, design verification, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• To lead development of SiC power technologies, serving as both front and back-end process integration in collaboration with advanced module development team. And aim
to grow this team to ~10 headcounts in the next 3 years.

• Optimize and customize process flows for individual SiC products

• Identify and resolve process integration issues and related problems

• Develop specific or derivative processes to meet customer needs

• Support new designs by conducting module characterization and developing effective design rules

• Define and implement measures to enhance stability, yield, reliability, and reduce development costs & time

• Plan and implement sustainable corrective actions to address process deviations

• Continuously monitor and utilize expertise in process and equipment capabilities to achieve optimal device performance

• Determine the correct and effective way to deliver processes, functional devices, and other items to multiple customers

• Perform project management tasks and conduct data analysis

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device Physics

• Highly proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and MOSFET device physics

• Proficient in teaching and knowledge transfer to junior staff members

• Strong communication skills to effectively convey information about process module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data; combined with strong presentation abilities.

Purpose of Job

This position is responsible to monitor ongoing construction projects and ensure that there are completed within project budget and schedule.

Central to it is to formulate relevant cost estimates during the project design phase and following monitor and manage project costs throughout the construction phase. Expected to support in resolving any disputes a between different parties involved in the construction project.

Key Accountabilities:

Tender: Manage the tender process from preparations to evaluation / recommendations. Understand the planning objectives to translate conceptual drawings to required quantities. Preparation of all cost estimates and bills of quantities (BOQ) and render document and conduct gap analysis on the BOQ and design drawings.

Price Benchmarking: Participate in pre-tending activities to obtain market sensing and raise relevant pre-bid queries in estimating the procurement value. Evaluate and benchmarking price.

Contract Management & Administration: Document, administer and advise on contractual disputes and matters. Standardise contract documents and advise in contractual execution, variations or disputes. Advise in mode of contracting with various parties, eg Consultants, Site Supervisors, Contractors, Sub-contractors etc.

Budget Management: Manage overall project finance from budget forecasting and actual invoice management. A strong sense of detailed (line item) project budget management, valuation of work done and handle claims and variations.

Stakeholder Management & Implementation: Collaborate with project managers, architects, engineers, contractors and other stakeholders to achieve value for money.

Job Requirements:

• Possess at least 7 years of relevant experience in construction management or Quantity Surveyor (QS) experiences management, relevant experience in government procurement process and policies.
• Preferred to have professional membership or certifications in quantity survey or construction management.
• Background in quantity surveying, construction management or related field, or experience in quantity surveying or cost consulting, with experience executing and administering various contracting forms (D&B, NSC, DSC etc).
• Experience working on Biosafety regulated construction projects, including office and laboratory
• Knowledge of health and safety regulations and environmental standards, and familiarity with contract law and construction contracts.
• Able to work under pressure and adapt to changes within a fast-paced environment.
• A self-driven and meticulous individual who has the strong ability to multi-task.