NTI-NTU Corporate Laboratory is a collaboration between Nanofilm Technologies International Limited (“Nanofilm”, “NTI”), Nanyang Technological University (“NTU”) and supported by Singapore under RIE2025. The Laboratory’s objective is to propel Innovation and Technologies commercialisation through NTU’s innovation and NTI’s deep technology. NTI-NTU Corporate Laboratory aligns with Singapore’s RIE2025 handbook – which emphasises the nation’s commitment to research and innovation, aiming to drive economic growth and address national challenges.

The Nanyang Technological University NTI-NTU Corporate Laboratory is seeking to hire a Research Associate. The selected candidate will innovate Optical and Metasurface Design.

Key Responsibilities:

• Responsible for optical system design and development for metasurface based SLM 3D Holograph Display, Near-Eye Display, Virtual Reality and Augmented Reality etc. applications.
• Good experience on optical lens and system (e.g. Metalens) design
• Research meeting arrangement with project PIs and researchers
• Perform and analyze material/optics characterization
• Prepare monthly reports and presentations for meetings and project deliverables.

Job Requirements:

• A Master degree in the areas of Optical Engineering and/or Photonics devices and System.
• Knowledge and/or experience in using optical simulation tools such as Zemax, CodeV etc.
• Good interpersonal skills with the ability to work independently and also in a team environment.
• Entry level candidates are welcome to apply.

We regret that only shortlisted candidates will be notified.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.
  

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and specifications.
• Construct verification testbenches using standard verification languages and methodologies, ensuring comprehensive coverage.
• Author and execute test cases to validate mixed-signal circuits, focusing on functionality, performance, and reliability.
• Analyze verification results meticulously, offering constructive feedback to design teams for improvements.
• Collaborate closely with design and layout teams to pinpoint and resolve any design issues encountered during verification.
• Innovate and refine verification methodologies, tools, and techniques to enhance scalability and portability.
• Provide final sign-off on mixed-signal designs, ensuring readiness for tape-out.

Requirements:

• Bachelor’s degree in electrical & electronic or equivalents and with minimum 7 years of working experience.
• Proficient in analog and mixed-signal circuit design and verification principles.
• Capability to formulate test plans, deliver presentations on findings, and communicate effectively with cross-functional teams.
• Familiarity with verification methodologies and tools including simulators, waveform viewers, automated execution, simulation time optimization, and coverage analysis.
• Proficient in programming abilities, capable of crafting efficient scripts or programs in languages such as Perl, Python, and/or C.

__________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Job Responsibilities:

• Identify project design hazards, construction risks, and constructability issues.
• Develop corresponding mitigation measures together with the project team.
• Chair regular risk mitigation meetings and training with clients and internal parties.
• Advise management on alternative safer and higher productivity construction methodologies.
• Review method statements and risk assessments for safety and construction compliance.
• Attend meetings related to construction progress, risks, etc.
• Any other duties as assigned by the Managements.

Job Requirements:

• Have reasonable exposure in safety and health for construction especially on transportation infrastructure projects in a similar nature
• Attended the Design for Safety (DfS) for Professional Course and passed the assessment or equivalent.
• A registered PE or Architect with a Practicing Certificate OR
• Minimum 10 years relevant experience in the design and the supervision of the construction of structures with at least 5 years in design which includes contributions to designs and writing specification
• Have a degree accepted by PE Board or Board of Architect and construction related degree accepted by Singapore Institute of Surveyors (SISV) and Society of Project Managers (SPM)
• Possess excellent leadership, planning, good management skills, interpersonal communication and negotiation skills
• Have experience in LTA projects have an advantage

Job Responsibilities:

1. Assisting and supporting technical sales team in terms of scope of supplies and costing with respect to electrical, automation requirements during the prospecting stage for water/wastewater related systems and projects.
2. Liaising and communicating with agents/distributors/OEM partners/end-user customers on technical details and specifications of parts and components where EICA works are concerned.
3. Design and producing electrical, control panel drawings (AutoCAD or Eplan), BOM list generation and hardware component selection.
4. Developing PLC programming & HMI project (Siemens /Allen Bradley etc) for all process and functional controls of water/wastewater related systems and instrument.
5. Liaising, negotiating, and managing sub-suppliers/sub-contractors in Singapore and in the region with respect to procurements of all wiring and cabling works, fabrication and assembly of control panels for systems as well as for in-situ installation of water/wastewater related systems or projects.
6. Determining and monitoring procurement and production progress and schedules where cabling and wiring works, control panels’ PLC works and supplies are concerned.
7. On site electrical installation supervision, electrical panel testing, instrumentation configuration, loop test and automation commissioning works.
8. Compiling and handing over operation and maintenance (O&M) manuals (electrical and PLC portions etc) to our agents/distributors and end-user customers.

Requirements:

• Diploma / Degree in Electrical Engineering or Computer Science.
• Good Interpersonal relationship and communication skills with proficiency in spoken and written English.
• Minimum 5 to 8 years of working experience in Water Industry or engineering projects would be advantageous.
• Knowledge of PLC programming (Siemens /Allen Bradley etc)
• Willingness to travel locally or to regional countries occasionally for site installation, trouble-shooting or testing and commissioning duties at clients' project sites
• Able to work independently and a good team player.
• Senior position will be considered for candidates with more experience.
• Candidate who are able to start work within short notice or immediately would be advantageous.

Are you interested in joining a team that is revolutionizing the resource exploration and navigation industry? Atomionics is developing quantum sensors using cold atom interferometry, where atoms are cooled to nearly absolute zero using lasers. At such extreme temperatures, these atoms behave like waves, enabling precise measurement of forces acting on them.

This technology has vast potential applications, including advancing the zero-carbon energy transition, enhancing the performance of inertial navigation systems, and revolutionizing the global positioning system. At Atomionics, you will have the opportunity to design, prototype, test, refine and manufacture Quantum Gravity Sensors. You will develop solutions to improve the performance of our sensor, while also making it compact and robust for field deployment on projects around the world.

Atomionics is backed by some outstanding investors across private and public sectors, such as Wavemaker, SGInnovate, Cap Vista, 500 Startups, and other notable angels.

Responsibilities

• Design and fabrication of jigs, mounts, and fixtures for optics, electronics, and vacuum assembly.
• Create CAD models and engineering drawings, and select appropriate manufacturing processes forprecision manufacturing and fabrication of optomechanical components.
• Structural, vibrational, and heat transfer analysis (FEA) to ensure robustness in harsh environment
• Design temperature and vibration control systems for different subsystems.
• Liaise with our international supply chain partners located in China, France, Germany, India, Italy,USA, etc. and work within a multicultural team.

About you

• An absolutely driven individual with creative problem-solving skills, analytical mind, and persistence, ideally, demonstrated
• Highly skilled with CAD software: Autodesk Inventor / Solidworks etc
• Deeply knowledgeable in manufacturing techniques, surface finishing and assembly
• Skilled in GD&T for engineering drawings including tolerance stacks
• Skilled with hands-on fabrication including machining lathe, CNC, laser cutter, 3D printers

Even better if you have

• Experience in thermal design, including heat sinks, heat pipes, liquid heat exchangers, peltiers and FEA for thermal simulations
• Experience in designing simple PCBs & cable harnesses
• Been through a full product development cycle for a device with a complex system architecture
• Worked on personal hobby projects (and can brag about them!)

What we can offer you

• A chance to learn about the intricacies of deep-tech research, product development, and strategy in a high-growth startup while working with some of the best engineers and physicists
• Work on the cutting edge of quantum technology
• Develop robust applications for translational research
• Board games and curry night

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness.
• Integrate and validate IP blocks for seamless system functionality.
• Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs.
• Collaborate with backend team in RTL coding, implementation, and synthesis for successful tapeout.
• Create and maintain reusable IPs for AI/in-memory computing.
• Support Post-Si testing to ensure product functionality and quality.
• Mentor junior engineers to facilitate their professional growth.
• Contribute to design reviews for improved product performance and reliability.
• Stay current on RTL design methodologies for efficiency and quality.
• Collaborate with cross-functional teams for successful product development.

Requirements:

• Minimum Master in Electrical Engineering with 5 years of working experience with emphasis on RTL/SoC/digital design.
• Proficient in Verilog and SystemVerilog.
• Proficient in VCS, Verdi, or similar industry-standard tools.
• Skilled in pre-layout and post-layout simulation.
• Knowledgeable about the design flow and collaboration with backend teams.
• Familiar with AMBA APB and AXI protocols.
• Familiar with RISC/Arm or other core architectures.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

OVERVIEW

Responsible for designing and delivering customized logistics solutions that meet client needs and align with the company’s strategic goals. This role involves working closely with clients, internal teams, and external partners to develop and implement innovative logistics solutions, ensuring successful program execution from concept to completion.

ROLES AND RESPONSIBILITIES:

Solution Design and Development (Pre-sales)

• Collaborate with clients to understand their logistics challenges and business objectives.
• Develop tailored solutions that address client needs while optimizing efficiency, cost, and service levels.
• Create detailed solution proposals, including process flows, resource requirements, and timelines.

Client Relationship Management:

• Serve as the primary point of contact for clients during the solution development and implementation phases.
• Build and maintain strong client relationships, ensuring satisfaction and fostering long-term partnerships.
• Conduct regular reviews with clients to assess program performance and identify opportunities for improvement.

Continuous Improvement:

• Analyze the effectiveness of implemented solutions and recommend enhancements to improve efficiency and performance.
• Stay updated on industry trends, technologies, and best practices to drive innovation in logistics solutions.
• Lead initiatives to improve internal processes and methodologies for solution development.

JOB REQUIREMENTS:

• Minimum 5 years of experience in solution design from 3PL company.
• Tertiary education related to logistics/ supply chain management/ business/ engineering
• Experience in developing and implementing complex logistics solutions.
• Strong problem-solving and analytical skills.
• Excellent communication and presentation abilities.
• Proficiency in project management and logistics software tools.
• Ability to manage multiple projects simultaneously and work under pressure.

Only with 3PL experience may apply.

Salary shall commensurate with relevant experience.

We regret that only shortlisted candidates will be notified.

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team

Requirements

• Minimum MSEE, or BSEE, or equivalent, plus 3+ years of Digital Design and verification related experience
• Experience / knowledge in CMOS Image Sensor and Image Signal Processing (ISP)
• Experience / knowledge in System C/C++, System Verilog, and Catapult HLS tool.
• Strong debugging and problem-solving skills
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours

Job Description& Responsibilities:

· Responsible for advanced optical module/ethernet product hardware system and circuit design, provide design reviews, drive system/product design trade-offs, make data driven design choices to define product architecture

· Responsible for new product design verification and characterization, conduct high- speed link simulation, failure analysis and debugging in NPI stages to optimize design and ensure performance.

· Work with cross-functional teams to develop new products that are time to market and superior in performance, quality and cost.

· Contribute to optical transceiver module/ethernet product architecture and engineering specifications based on product and customer requirements.

· Perform system performance validation and DVT test plans, debug and analyze test results.

· Provide design documentation and technical reports.

Qualification:

· Bachelor/Master degree or above in electrical or electronics engineering or related fields.

· More than 7 years of working experience in optical module/networking switch or relevant products design and development.

· Sound knowledge of optical transceiver standards, architectures and applications, well understanding of design & trade-offs with respect to size, power consumption, thermal management and manufacturing complexity.

· Solid understanding of high speed signal integrity and power integrity analysis and optimization on PCB/system channel link analysis, well versed in modeling and simulation using tools such as HFSS, ADS, SIWAVE, LTSPICE etc.

· Familiar with high speed digital and analog ICs (CDRs, DSPs, SerDes, TIAs, DC-DC Converters, LDOs).

· Knowledge in IEEE 802.3 Ethernet and PCIe spec will be a plus.

· Extensive experience with lab equipment such as Sampling Scope, RealTime Scope, Protocol Analyzer, BERT, PNA/VNA.

· A solid team player with strong leadership and inter-personal skills, able to take proactive, collaborative and creative approaches to innovate and influence for optimal results.

· Strong written and verbal communication skills.

· Willing to travel as require.

Responsibilities:

• Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
• Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
• Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
• Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
• Collaborate with design engineers to troubleshoot and resolve simulation issues.
• Provide support to test engineers during post-silicon validation.
• Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

• Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
• Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
• Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
• Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
• Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Collaborate with Senior Engineers for design requirements and specifications.
• Assist in Analog, mixed-signal, and digital IC design.
• Participate in RTL coding and verification for digital ICs.
• Support design verification tasks.
• Conduct circuit simulations and analysis using Cadence, Synopsys, and Mentor Graphics tools.
• Assist layout engineers with floor planning.
• Analyze and debug silicon failures, suggesting design improvements.
• Contribute to the development of design methodologies to enhance efficiency.
• Document design work and test plans.
• Collaborate with cross-functional teams to ensure successful tape-out.

Requirements:

• Bachelor’s Degree in Electrical Engineering or equivalents.
• At least 2 years of relevant working experience.
• Understanding the IC development flow in advanced CMOS processes, including design, layout, and tape-out.
• Understanding the fundamental theories of digital or analog circuit design.
• Capability to generate inventive designs and circuit solutions tailored to fulfill customer needs.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and specifications.
• Construct verification testbenches using standard verification languages and methodologies, ensuring comprehensive coverage.
• Author and execute test cases to validate mixed-signal circuits, focusing on functionality, performance, and reliability.
• Analyze verification results meticulously, offering constructive feedback to design teams for improvements.
• Collaborate closely with design and layout teams to pinpoint and resolve any design issues encountered during verification.
• Innovate and refine verification methodologies, tools, and techniques to enhance scalability and portability.
• Provide final sign-off on mixed-signal designs, ensuring readiness for tape-out.

Requirements:

• Bachelor’s degree in electrical & electronic or equivalents and with minimum 7 years of working experience.
• Proficient in analog and mixed-signal circuit design and verification principles.
• Capability to formulate test plans, deliver presentations on findings, and communicate effectively with cross-functional teams.
• Familiarity with verification methodologies and tools including simulators, waveform viewers, automated execution, simulation time optimization, and coverage analysis.
• Proficient in programming abilities, capable of crafting efficient scripts or programs in languages such as Perl, Python, and/or C.

__________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Responsibilities:

• Create mixed-signal verification and coverage strategies tailored to complex IC designs, aligning with design architecture and specifications.
• Construct verification testbenches using standard verification languages and methodologies, ensuring comprehensive coverage.
• Author and execute test cases to validate mixed-signal circuits, focusing on functionality, performance, and reliability.
• Analyze verification results meticulously, offering constructive feedback to design teams for improvements.
• Collaborate closely with design and layout teams to pinpoint and resolve any design issues encountered during verification.
• Innovate and refine verification methodologies, tools, and techniques to enhance scalability and portability.
• Provide final sign-off on mixed-signal designs, ensuring readiness for tape-out.

Requirements:

• Bachelor’s degree in electrical & electronic or equivalents and with minimum 7 years of working experience.
• Proficient in analog and mixed-signal circuit design and verification principles.
• Capability to formulate test plans, deliver presentations on findings, and communicate effectively with cross-functional teams.
• Familiarity with verification methodologies and tools including simulators, waveform viewers, automated execution, simulation time optimization, and coverage analysis.
• Proficient in programming abilities, capable of crafting efficient scripts or programs in languages such as Perl, Python, and/or C.

__________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Job Description

• Develop and create 2D and 3D piping layouts, plans, isometrics, ensure that piping designs are optimized for efficiency, ease of maintenance, and compliance with project and industry standards
• Create detailed piping layouts and general arrangements for the plant, ensuring that pipe routing minimizes interference with other disciplines (civil, mechanical, electrical) and optimizes space utilization
• Collaborate with stress engineers to ensure pipe routing and support arrangements can handle thermal expansion, seismic loads, and pressure differential
• Prepare detailed piping design deliverables, including pipe routing layouts, support details, isometric drawings, and bill of materials (BOM). Ensure designs comply with all relevant standards
• Collaborate with process, mechanical, civil, and electrical teams to ensure seamless integration of piping designs with other plant systems
• Work closely with the procurement team to prepare piping material specifications, liaise with suppliers for quotation and support vendor evaluations for piping components (valves, flanges, supports, etc.)
• Review piping installation drawings and provide feedback for improvement to ensure constructability
• Conduct site visits as needed to verify piping installations are in accordance with the approved designs

Requirements

• Diploma/Degree in Mechanical Engineering
• For Degree holder, minimum 5 years of experience in piping design. For Diploma holder, minimum 8 years of experience is required. For senior position, candidate must have at least 10 years of experience
• Must be a self-starter and be able to work with minimal supervision, make sound decisions, take independent action, and provide focused solutions to assigned projects
• Possess strong inter-personal and communication skills and be able to work well with people at all levels in the organization
• In-depth knowledge of piping design codes and standards (ASME, ANSI, PUB regulations)
• Must have advanced computer literacy in commonly usedsoftware applications such as Navisworks, Bentley View, AutoCAD, piping design & drafting tools and MS Office
• Experience in process plant (such as wastewater treatment plant, sludge incineration plant, etc.) is preferred

RESPONSIBILITY

• Assume a technical expertise in assessing sites, conducting detailed drawings, and estimating Solar project capacity and costs.
• Formulate comprehensive design specifications and functional requirements for the region, ensuring alignment with project needs.
• Complete system designs for projects including site plans, mechanical racking and attachment plans, single-line electrical drawings, specification of balance of system location and interconnection details.
• Conduct in-depth analysis of factors influencing system performance.
• Partner with the O&M Team to evaluate system performance, identify optimization opportunities, and drive continuous improvement initiatives.
• Perform software simulations of solar photovoltaic (PV) system performance & energy production
• Execute design calculations, encompassing voltage drop analysis, fault current assessments, and system optimization strategies.
• Ensure compliance with EPC contract specifications and regulatory requirements, mitigating risks and optimizing project outcomes including on-site engineering support.
• Collaborate closely with contractors to review and approve engineering drawing submissions, maintaining rigorous quality control standards.

QUALIFICATIONS & EXPERIENCE

• Degree/Diploma in Electrical Engineering discipline
• 3 to 5 years’ experience in Solar PV system design / engineering.

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Proactive self-starter with an ability to thrive in dynamic environments
• Solution-oriented approach with a track record of overcoming complex challenges and driving innovation
• Collaborative team player and able to guide the drafting team.
• Adaptability and willingness to embrace new technologies and methodologies
• Proficient in Microsoft Office and Excel capabilities for data analysis and reporting
• Proficient in design software such as PV AutoCAD,

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team

Requirements

• Minimum MSEE, or BSEE, or related/equivalent discipline
• Experience / knowledge in RTL, C/C++ programming and verification
• Strong debugging and problem-solving skills
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours
• C++/SystemC knowledge with High Level Synthesis experience is a plus.
• Experience / knowledge in CMOS Image Sensor is a plus

Responsibilities

• Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)
• Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation
• Verify Logic at ISP level and Digital System level
• Optimize Design for less gate count and low power consumption
• Drive ISP Design activities in close collaboration with ISP Algorithm Team, ISP Design leaders in other sites, and Digital System Design Team
• Leading, supervising and mentoring a team of RTL design engineers

Requirements

• Minimum MSEE, or BSEE, or equivalent, plus 7+ years of Digital Design and verification related experience
• 3+ years project management / people management experience / skill
• Experience / knowledge in CMOS Image Sensor and image signal processing (ISP)
• Experience / knowledge in System C/C++, System Verilog, and Catapult HLS tool.
• Ability to lead teams and collaborate effectively with people in different functions
• Strong time management skills to ensure timely completion of deliverables
• Good communication and interpersonal skills
• Result oriented and embrace change behaviours

Job Description:

• Experienced in structural engineering design works mainly for road/viaduct projects.
• Supervision of drafting for the preparation of project documentation.
• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Participate in the planning of projects as required.
• Previous experience in the use and application of Appropriate Singapore local and international Standards for structural design.
• Attend site inspection with required

Job Requirement

• Bachelor of Engineering (Civil) with minimum 5 years of structural engineering experience.
• Good knowledge of the various engineering design software, for instance Autocad, BIM
• Experienced in LTA projects would be advantage.
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player.
• Meeting delivery deadlines and budgets.

Job Description:

• Experienced in structural engineering design works mainly for road/viaduct projects.
• Supervision of drafting for the preparation of project documentation.
• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Assist in the preparation of technical detail for quotations, contract documentation and technical specifications.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Participate in the planning of projects as required.
• Previous experience in the use and application of Appropriate Singapore local and international Standards for structural design.
• Attend site inspection with required

Job Requirement

• Bachelor of Engineering (Civil) with minimum 3 years of structural engineering experience.
• Good knowledge of the various engineering design software, for instance Autocad, BIM
• Experienced in LTA projects would be advantage.
• Excellent written and verbal communication skills with an excellent eye for detail.
• Team Player.
• Meeting delivery deadlines and budgets.

Job Description:

• Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required.
• Coordinate with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work.
• Prepare technical submissions for materials, construction methods and C&S shop drawings.
• Resolve any construction issues on drawings and liaise closely with relevant departments as well as the authorities, to ensure consistency with contractual technical specifications and statutory rules and regulations.
• Report on work progress during meetings.
• Attend site inspection with required.
• Any other tasks that assigned by reporting officer.

Job Requirement:

• Possess a Degree in Engineering (Civil)
• Experience in handling LTA Infrastructure design works
• At least 8 years design experience
• Good knowledge of the various engineering design software, for instance Autocad, BIM
• Candidate with strong relevant years of experience will be considered for senior positions