ASIC Physical Design Engineer
Skills and responsibilities:
Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. RTL synthesis, placem...