Total 24 job vacancies by Renesas Electronics

We are looking for an enthusiastic candidate whose primary responsibilities will be coding, debugging and testing of embedded firmware application designated for Renesas MCU, candidate will be reporting to Manager, Application Engineering.

Key Responsibilities

•Design, develop embedded application examples and proof-of-concept based on Renesas MCU including low-level driver firmware.

•Provide technical support to Renesas customers related to all aspects of MCU and developed solutions.

•Efficient technical support for Renesas marketing/sales team in design activities. 

•Collaborate closely with cross-functional team to ensure seamless operation of hardware-software interaction.

Work closely with Automotive customers to understand their technical needs and provide solutions that align with the company’s product offerings. Your role is to offer technical expertise especially on MCU, facilitate product integration, and troubleshoot any issues that arise during or after the implementation process. You will collaborate with the sales team to help win new business by showcasing the technical advantages of products, assist with product design-in, and provide ongoing support to ensure customer satisfaction.    

Key Responsibilities

• Quickly become familiar with Renesas product portfolio
• Interface professionally with Automotive customers to understand their technical needs and challenges.
• Identify and pursue new design activity at key Automotive customers
• Work collaboratively with sales, marketing, distribution partners and product engineers to define the best solutions for customers, including block diagrams, schematics, simulations, etc.
• Learn the process and skills to accurately track and forecast revenue
• Establish and grow relationships across a wide range of customers
• Grow sales funnel and revenue

• Accounts payable/Staff claims
• Fixed Asset management
• Bank transactions & Cashflow reporting
• Consolidated Schedules
• Expatriate Tax
• Statistic Survey

Responsibilities

· Design, develop, and maintain web-based applications using modern web technologies and frameworks.

· Write clean, efficient, and well-documented code following best practises and coding standards.

· Implement user interfaces that work seamlessly across different browsers and devices.

· Integrate third-party APIs and services into web applications to enhance functionality and user experience.

· Perform code reviews, testing, and debugging to identify and fix issues, optimize performance, and ensure reliability of web applications.

· Provide technical support and assistance to end-users and other team members as needed.

Qualifications

· Bachelor’s or Master’s degree in Computer Science, Information Technology, or related field.

· Experience working as a Web Developer, Software Engineer, or similar role.

· Proficiency in full-stack web development

· Programming skills in Python and Typescript

· Experience with server-side frameworks such as Django, React, or similar.

· Knowledge of web standards, protocols, and best practices for web development.

· Experience with applying security mechanisms for web applications such as handling certificates and tokens.

· Experience with version control systems such as Git.

· Strong problem-solving and troubleshooting skills.

· Excellent communication and collaboration skills.

Responsibilities

• Participate in the system solution design of next generation multi-core multi-chip AI sub-system that scales beyond 1000s TOPS for high performance computing.
• Perform system validation, use case validation, performance analysis, benchmarking, modeling to identify performance bottlenecks, and system parameters optimization.
• Deliver optimized solutions that meet the demanding requirements of HPC workloads and articulate them effectively across stakeholders ranging from toolchain, software and hardware teams, domain experts, and to technology leadership.
• Collaborate with hardware teams to design and optimize the system's computational components, including processors, accelerators, interconnects, and memory subsystems.
• Collaborate with software developers to define and implement software frameworks, libraries, and tools that maximize performance and productivity on the target HPC architecture.
• Collaborate with domain experts and application developers to understand the unique requirements of specific workloads and propose tailored architectural solutions.

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field.
• Good understanding of multiple key technology areas is expected (Camera/Image sensors, Graphics, Audio, Video, Display, AI/ML, Computer Vision, distributed systems, SoC architecture, RTOS).
• Good problem-solving abilities and the ability to analyze and address complex performance and scalability challenges.
• Programming skills in languages such as C, C++, and/or Python.
• Ability to translate and navigate business and customer needs into actionable items for software and hardware development teams.
• Working knowledge with ML frameworks like PyTorch and TensorFlow.
• Working knowledge of ARM and/or RISCV CPU.
• Working knowledge of software stack components, such as compilers, runtime systems, job schedulers, and scientific libraries.

Preferences

• Experience in performance optimization via software-hardware co-design is a plus.
• Experience with engineering tools and workflows for large systems is a plus.
• Experience with SystemC modeling is a plus.
• Working knowledge with ARM and/or RISCV ISA is a plus.
• Working knowledge with FPGA is a plus.
• Working knowledge with OpenCL/CUDA/SYCL programming is a plus.
• Working knowledge of system interconnects like GbE, PCIe, InfiniBand, etc is a plus.
• Working knowledge with RTL design is a plus.

Responsibilities

• Participate in the software design of the runtime software across multi-device and heterogeneity.
• Apply code optimization techniques, ensuring efficient and optimized performance of the runtime software components.
• Participate in architecture definition; collaborate closely with software architect in refining architecture designs.
• Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance.

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field.
• 3 years of embedded software design and development on SoCs and/or ASICs.
• Good coding skills in C/C++.
• Good knowledge of SW design patterns.
• Good knowledge of SDLC.
• Good knowledge of RTOS and/or Linux OS.
• Good knowledge of multi-thread and multi-process software design and debugging.
• Experience with embedded system involving multi-core CPU/DSP.
• Knowledge of debuggers (LLDB, GDB) and profilers on heterogeneous hardware system.

Preferences

• Experience with Python is a plus.
• Knowledge of Linux kernel and driver development is a plus.
• Knowledge of CNN and common NN operators/layers like Conv2D, BatchNorm, etc is a plus.
• Knowledge of managing CI/CD pipeline (especially under GitLab) is a plus.
• Knowledge of inference engines such as TFLite, OpenVINO runtime, ONNX runtime, TVM runtime, etc is a plus.
• Knowledge of JTAG debugger and bare-metal bring-up is a plus.
• Knowledge of high-performance domain-specific languages (SYCL/CUDA/OpenCL) is a plus.
• Knowledge of PyTorch or TensorFlow is a plus.
• Knowledge of just-in-time compilation techniques is a plus.

Job Purpose:

The Office Administrator handles all office management duties for the Renesas Singapore site, acting as the office support, and providing assistance to SG-based staff. This role involves screening and handling general inquiries, managing routine General Affairs and Human Resources requirements, and supporting the HRGA/BU.

Principal Accountabilities:

• Coordinate office activities and operations to ensure efficiency and compliance with company policies
• Handle all office management duties, including but not limited to ensuring meeting rooms and tools are operational and following up with vendors/contractors if not; scanning and copying documents; document filing with European HQ; managing general office supplies; and following up on account payables for office supplies or services used by the office (landlord, utilities, phones, etc.)
• Screen and handle calls/inquiries made to the office
• Act as a receptionist when needed and coordinate meetings or catering if needed
• Organize BU-related office activities, including visitor registration, team event planning, and ensuring new starters have the necessary hardware and requirements before onboarding
• Assist in updating departmental reports to support the BU's needs
• Support team members with all job-related organizational tasks, e.g., travel arrangements, IT hardware issues, purchasing and payment processes; manage logistics for meetings and host international visitors (e.g., reception, hotel, travel support)
• Assist HRGA teams in raising order requisitions to support office or facility-sustaining requirements
• Provide physical support or find capable hands for office repairs, maintenance, and replacement work; conduct facility-related tasks and maintain site safety and security
• Any other ad-hoc office events or requirements for the SG office.

1. Participate and lead in the software architecture design of the runtime software across multi-device and heterogeneity.
2. Apply code optimization techniques, ensuring efficient and optimized performance of the runtime software components.
3. Deliver architecture specifications to developers and articulate them effectively across stakeholders ranging from toolchain, system and hardware teams, and to technology leadership.
4. Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance.

Responsibilities

· Development of AI compiler framework, high performance kernel authoring and acceleration onto next generation of hardware architectures.

· Contribute to the development of the industry-leading machine learning framework core compilers to support new state of the art inference and training machine learning/AI accelerators and optimize their performance.

· Analyze deep learning networks, develop & implement compiler optimization algorithms.

· Collaborating with AI research scientists to accelerate the next generation of deep learning models such as recommendation systems, computer vision, or natural language processing.

· AI compiler kernel development, including graph optimization, tiling and memory allocation.

Qualifications

· Bachelor’s or Master’s degree in computer science, machine learning, mathematics, physics, electrical engineering or related field.

· Experience in C/C++, Python, or other related programming language

· Experience in accelerating deep learning models or libraries on hardware architectures.

· Experience working with machine learning frameworks such as PyTorch, TensorFlow, ONNX etc.

· Experience in intermediate IR such as LLVM.

· Experience of Product Owner of scrum team is plus.

Responsibilities

· Design, build, and maintain infrastructure that supports our application development, with a focus on reliability, scalability, and performance.

· Implement and automate deployment, monitoring, and scaling processes to ensure the smooth operation of our systems and services.

· Monitor system performance and reliability metrics, troubleshoot issues, and implement solutions to prevent downtime and improve efficiency.

· Collaborate with our teams Engineers to design, develop, and deploy reliable and scalable applications.

· Develop and maintain tools and scripts for automation, configuration management, and monitoring of our infrastructure and applications.

· Respond to incidents and emergencies to minimize downtime and ensure reliability of or systems.

· Continuously evaluate and improve our infrastructure, processes, and practises to enhance reliability, scalability, and efficiency.

· Stay up-to-date with industry trends, best practises, and emerging technologies in site reliability engineering and cloud computing.

Qualifications

· Bachelor’s or Master’s degree in Computer Science, Information Technology, or related field.

· Experience working in a similar role.

· Programming skills in languages such as Python, Java, or similar.

· Hands-on experience with cloud platforms such as AWS, Azure, or GCP.

· Experience with containerization technologies such as Docker and container orchestration platforms such as Kubernetes.

· Proficiency in Linux system administration, shell scripting, and network troubleshooting.

· Experience with infrastructure as code tools such as Terraform, Ansible, or similar.

· Knowledge of CI/CD pipelines and automated testing frameworks.

· Strong analytical and problem-solving.

· Excellent communication and collaboration skills

In this role, you will be part of the Machine Learning Core team. The team has been developing a comprehensive AI Compiler strategy that delivers a highly flexible platform to explore new DL/ML model architectures, combined with auto-tuned high performance for production environments across a wide range of hardware architectures. The compiler framework, ML graph optimizations and kernel authoring specific to the hardware impacts performance, developer efficiency & deployment velocity of both AI training and inference platforms. You will be developing AI compiler frameworks to accelerate machine learning workloads on the next generation of AI hardware. You will work closely with AI researchers to analyze deep learning models and how to lower them efficiently on AI platforms. You will also partner with hardware design teams to develop compiler optimizations for high performance. You will apply software development best practices to design features, optimization, and performance tuning techniques. You will gain valuable experience in developing machine learning compiler frameworks and will help in driving next generation hardware software co-design for AI domain specific problems. 

Our mission is to use the latest machine learning and cloud technologies to develop the best AI inference for self-driving vehicle and advanced driver safety engineers. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to deploy your AI software to the billions of devices we ship to customers every year. You will join our newly formed AI Solutions global research and development organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small. Our key locations are the Tokyo, London, Dusseldorf, and Ho Chi Minh City metro areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key location hubs such as Tokyo. 

Overview 

We are seeking a talented and motivated System Architect (AI Sub-system) to join our R&D team to own, define, and drive exploration and design of our next generation AI sub-system involving multi heterogeneous devices in high performance computing (HPC) SoCs

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year. You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small. Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo.  

Responsibilities  

1. Participate and lead in the system solution design of next generation multi-core multi-chip AI sub-system that scales beyond 1000s TOPS for high performance computing.
2. Perform system validation, use case validation, performance analysis, benchmarking, modeling to identify performance bottlenecks, and system parameters optimization.
3. Deliver optimized solutions that meet the demanding requirements of HPC workloads and articulate them effectively across stakeholders ranging from toolchain, software and hardware teams, domain experts, and to technology leadership.
4. Collaborate with hardware teams to design and optimize the system's computational components, including processors, accelerators, interconnects,and memory subsystems.
5. Collaborate with software developers to define and implement software frameworks, libraries, and tools that maximize performance and productivity on the target HPC architecture.
6. Collaborate with domain experts and application developers to understand the unique requirements of specific workloads and propose tailored architectural solutions.

Overview 

We are seeking a talented and motivated Hardware Architect (AI Sub-system) to join our R&D team to own, define, and drive exploration and design of the next generation hardware for AI sub-system in high performance computing (HPC) SoCs.

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year. You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small. Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo.  

Responsibilities  

1. Participate and lead in the architecture design of next generation multi-core AI sub-system including CPU/DSP/NPU, memory hierarchies, scalable interconnects, etc.
2. Perform HW/SoC architectural modeling, performance analysis, trade-off analysis, PPA optimization, etc.
3. Deliver architecture specifications to design teams and articulate them effectively across stakeholders ranging from system and software teams to architecture peers, and to technology leadership.
4. Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance.

Overview

We are seeking a talented and motivated AI Math/System Acceleration and Validation Engineer to join our team. In this role, you will be part of the AI & Cloud Engineering (ACE) Division and Hybrid Compiler team.

The team has been developing a comprehensive AI Compiler strategy that delivers a highly flexible platform to explore new DL/ML model architectures, combined with auto-tuned high performance for production environments across a wide range of hardware architectures. The compiler framework, ML graph optimizations and kernel authoring specific to the hardware impacts performance, developer efficiency & deployment velocity of both AI training and inference platforms.

You will be developing AI compiler frameworks to accelerate machine learning workloads on the next generation of AI hardware. You will work closely with AI researchers to analyze deep learning models and how to lower them efficiently on AI platforms. You will also partner with hardware design teams to develop compiler optimizations for high performance. You will apply software development best practices to design features, optimization, and performance tuning techniques. You will gain valuable experience in developing machine learning compiler frameworks and will help in driving next generation hardware software co-design for AI domain specific problems.

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year. You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small.

Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo.

Responsibilities

• Development of AI compiler framework, high performance kernel authoring and acceleration onto next generation of hardware architectures.
• Contribute to the development of the industry-leading machine learning framework core compilers to support new state of the art inference and training machine learning/AI accelerators and optimize their performance.
• Collaborating with AI research scientists to accelerate the next generation of deep learning models such as recommendation systems, computer vision, or natural language processing.
• Develop core mathematical and system acceleration libraries and strategies to further accelerate AI workloads
• Analyze deep learning networks, estimate target latency and accuracy.
• Development of profiling tools for finding bottleneck parts of AI accelerators and models.
• Development of optimized inference application.

Qualifications

• Bachelor’s or Master’s degree in computer science, machine learning, mathematics, physics, electrical engineering or related field.
• Experience in C/C++, Python, or other related programming language
• Experience in accelerating deep learning models or libraries on hardware architectures.
• Experience working with machine learning frameworks such as PyTorch, TensorFlow, ONNX etc.
• Ability to speak and write in English at a business level.
• Experience of Product Owner of scrum team is plus.

Overview

We are seeking a talented and motivated AI compiler Engineer (AI Sub-system) to join our R&D team to own, define, and drive exploration and design of our next generation runtime software involving multi heterogeneous devices in high performance computing (HPC) SoCs.

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year.

You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small.

Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo.

Responsibilities

• Participate and lead in the software architecture design of the runtime software across multi-device and heterogeneity.
• Apply code optimization techniques, ensuring efficient and optimized performance of the runtime software components.
• Deliver architecture specifications to developers and articulate them effectively across stakeholders ranging from toolchain, system and hardware teams, and to technology leadership.
• Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field; Ph.D. is a plus.
• 10 years of embedded software design and development on SoCs and/or ASICs.
• Great coding skills in C/C++.
• Great knowledge of SW architectural patterns (layered/plugin/event-driven/ microkernel/etc).
• Good knowledge of SDLC.
• Good knowledge of RTOS and/or Linux OS.
• Good knowledge of multi-thread and multi-process software design and debugging.
• Experience with embedded system involving multi-core CPU/DSP.
• Experience with heterogeneous multi-device system involving GPU/NPU/FPGA.
• Knowledge of debuggers (LLDB, GDB) and profilers on heterogeneous hardware system.

Preferences

• Experience with Python is a plus.
• Experience with ARM and/or RISCV ISA is a plus.
• Knowledge of Linux kernel and driver development is a plus.
• Knowledge of CNN and common NN operators/layers like Conv2D, BatchNorm, etc is a plus.
• Knowledge of internal of inference engines like TFLite, OpenVINO runtime, ONNX runtime, TVM runtime, etc is a plus.
• Knowledge of JTAG debugger and bare-metal bring-up is a plus.
• Knowledge of high performance domain-specific languages (SYCL/CUDA/OpenCL) is a plus.
• Knowledge of PyTorch or TensorFlow is a plus.
• Knowledge of just-in-time compilation techniques is a plus.

Overview

We are seeking a talented and motivated Software Engineer (AI Sub-system) to join our R&D team to support the exploration and design of our next generation runtime software involving multi-heterogeneous devices in high performance computing (HPC) SoCs.

Our division’s mission is to use the latest AI and cloud technologies to develop the best AI inference for advanced driver safety engineers building self-driving vehicles and other high performance compute products. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to develop the infrastructure required to deploy our AI software to the billions of devices we ship to customers every year. You will join our newly formed AI & Cloud Engineering organization of around 100 software engineers. Due to strong demand for our AI-related products we are planning to triple in size in the next three years, so there is lots of room for you to help us grow the team together while remaining small.

Our team’s key locations are Tokyo, London, Paris, Dusseldorf, Beijing, Singapore, Ho Chi Minh City, and other metropolitan areas, but you can also join fully remotely from other locations globally or get our support to relocate to our key hubs such as Tokyo.

Responsibilities

• Participate in the software design of the runtime software across multi-device and heterogeneity.
• Apply code optimization techniques, ensuring efficient and optimized performance of the runtime software components.
• Participate in architecture definition; collaborate closely with software architect in refining architecture designs.
• Collaborate with silicon and platform bring-up to verify and debug the AI sub-system and its delivered performance.

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related field.
• 5 years of embedded software design and development on SoCs and/or ASICs.
• Good coding skills in C/C++.
• Good knowledge of SW design patterns.
• Good knowledge of SDLC.
• Good knowledge of RTOS and/or Linux OS.
• Good knowledge of multi-thread and multi-process software design and debugging.
• Experience with embedded system involving multi-core CPU/DSP.
• Knowledge of debuggers (LLDB, GDB) and profilers on heterogeneous hardware system.

Preferences

• Experience with Python is a plus.
• Knowledge of Linux kernel and driver development is a plus.
• Knowledge of CNN and common NN operators/layers like Conv2D, BatchNorm, etc is a plus.
• Knowledge of managing CI/CD pipeline (especially under GitLab) is a plus.
• Knowledge of inference engines such as TFLite, OpenVINO runtime, ONNX runtime, TVM runtime, etc is a plus.
• Knowledge of JTAG debugger and bare-metal bring-up is a plus.
• Knowledge of high-performance domain-specific languages (SYCL/CUDA/OpenCL) is a plus.
• Knowledge of PyTorch or TensorFlow is a plus.
• Knowledge of just-in-time compilation techniques is a plus.

Key Responsibilities:

• ⁠In charge of FAD management
• Assist in budget preparation and financial forecasting
• Support business unit/divisions in monthly expenses, actual against AOP
• Prepare financial statements, balance sheets, income statements, and cash flow statements.
• ⁠Collaborate with internal teams to provide financial analysis to support decision-making.
• ⁠Ensure compliance with accounting policies, procedures, and relevant regulations.
• ⁠Assist in tax preparation and compliance with tax regulations.

Requirements:

• Bachelor's degree in Accounting or Finance or its equivalent
• Strong knowledge of accounting principles and regulations.
• Proficient in accounting software and Microsoft Office (Excel).
• Strong analytical skill and innovative in resolving problems
• ⁠Strong communication skills
• Able to work independently and also collaboratively in a team

• Responsible for creating HTML and PDF versions of MCU software user’s manual using document generation tools.
• Must be able to use version control tools like git.
• Must have some knowledge of code documentation tools like Doxygen or Java Docs.
• Must be able to use Markdown as well as HTML, XML, and CSS. Should be able to manage and maintain document conversion tools based on Python.

• Responsible for creating HTML and PDF versions of MCU software user’s manual using document generation tools.
• Must be able to use version control tools like git.
• Must have some knowledge of code documentation tools like Doxygen or Java Docs.
• Must be able to use Markdown as well as HTML, XML, and CSS. Should be able to manage and maintain document conversion tools based on Python.

Responsibilities:

• Responsible for editing and preparing technical documents for publication.
• Documents are mainly microcontroller application notes, hardware/software manuals, and other technical documents.
• Must be able to produce clear and easy-to-understand documents in Renesas format in Microsoft Word and convert to PDF.
• Must be able to work with engineers to develop or clarify content.

Required skills:

• Technical communication in English
• Moderate-advanced use of Microsoft Word
• Some knowledge of microcontroller, software, and IoT terms and technology
• Familiarity with SharePoint and JIRA
• Basic knowledge of Visio, DITA writing and DITA-OT processing
• Basic understanding of Japanese language (Good to have)

Qualifications:

• Bachelor's degree in Electrical & Electronics Engineering or Technical Communication is preferred.
  English degree with more than three years’ experience in technical writing field is acceptable.
• At least three (3) years of technical writing or technical editing. Experience creating small and large documents with MS Word, Markdown, XML, HTML, and PDF.
• Ability to manage and maintain a document conversion system based on source code and Markdown. Systems include git for source version control, Markdown, HTML and PDF. Must be able to maintain and improve conversion scripts in Python and other scripting languages.

Responsibilities:

• Responsible for editing and preparing technical documents for publication.
• Documents are mainly microcontroller application notes, hardware/software manuals, and other technical documents.
• Must be able to produce clear and easy-to-understand documents in Renesas format in Microsoft Word and convert to PDF.
• Must be able to work with engineers to develop or clarify content.

Required skills:

• Technical communication in English
• Moderate-advanced use of Microsoft Word
• Some knowledge of microcontroller, software, and IoT terms and technology
• Familiarity with SharePoint and JIRA
• Basic knowledge of Visio, DITA writing and DITA-OT processing
• Basic understanding of Japanese language (Good to have)

Qualifications:

• Bachelor's degree in Electrical & Electronics Engineering or Technical Communication is preferred.
  English degree with more than three years’ experience in technical writing field is acceptable.
• Preferable to have experience in technical writing or technical editing, experience creating small and large documents with MS Word, Markdown, XML, HTML, and PDF.
• Ability to manage and maintain a document conversion system based on source code and Markdown. Systems include git for source version control, Markdown, HTML and PDF. Must be able to maintain and improve conversion scripts in Python and other scripting languages.

Be a part of a successful Application Development team in Renesas!

Responsibilities:

• Responsible to develop/outsource hardware designs on Analog measurements
• Responsible to develop/optimised required Firmware including APIs and Libraries
• Responsible to create application notes and training materials
• Build up Application Solution Skill set on Energy/Power Measurements
• Required to train and support Field Application Engineers and customers in ASEAN, India, Australia/NZ

Requirements:

• Degree in Computer Engineering/Computer Science/Electronic Engineering or its equivalent
• Proficient in C and assembly language programming with good understanding of microcontrollers/microprocessor basic architecture
• Creative and have a passion in embedded system design and development
• Possess good presentation and communication skills
• A team player who is self-motivated, resourceful, proactive and able to work in a collaborative environment with both individual and team decision making
• Ability to understand and execution of given project specification within timeline
• Ability to report regional requirements and provide technical support to FAEs and Strategic Customer
• Willing to travel
• Preferably 2 to 5 years of experience but fresh graduates may apply as well

Possessing the following will be added advantages:

• Lead engineer or managed a team of engineers
• Good understanding of Embedded software systems and the requirements of a Product
• Proficient in Analog and Digital Circuitry Hardware design/troubleshooting and Systems software Design
• Good understanding in Integrated Development Environment tools such as simulator, debugger, emulator
• Experience in version control (Git, SVN)

knowledgeable in

• CAD Tools such as Altium schematic entry and Layout or equivalent
• Understand Energy/Power Concept and Calculation
• Communication Stack/Protocol or equivalent
• Applications such as Metering, Sensory

Responsibilities:

• Responsible for creating HTML and PDF versions of MCU software user’s manual using document generation tools.
• Must be able to use version control tools like git.
• Must have some knowledge of code documentation tools like Doxygen or Java Docs.
• Must be able to use Markdown as well as HTML, XML, and CSS. Should be able to manage and maintain document conversion tools based on Python.

Required skills:

• Familiarity with Git or other version-control systems
• Experience with Markdown, HTML, CSS, and XML
• Familiarity with Doxygen or other document generation systems like Java Docs
• Experience with Python or other scripting languages
• Familiarity with MCU C coding terms
• Familiarity with Eclipse or e2 studio IDE (Good to have)
• Knowledge of Drupal web content management system (Good to have)

Qualifications:

· Bachelor's degree in Electrical & Electronics Engineering or Technical Communication is preferred.
English degree with more than three years’ experience in technical writing field is acceptable.

· At least three (3) years of technical writing or technical editing. Experience creating small and large documents with MS Word, Markdown, XML, HTML, and PDF.

· Ability to manage and maintain a document conversion system based on source code and Markdown. Systems include git for source version control, Markdown, HTML and PDF. Must be able to maintain and improve conversion scripts in Python and other scripting languages.

Responsibilities:

• Responsible for creating HTML and PDF versions of MCU software user’s manual using document generation tools.
• Must be able to use version control tools like git.
• Must have some knowledge of code documentation tools like Doxygen or Java Docs.
• Must be able to use Markdown as well as HTML, XML, and CSS. Should be able to manage and maintain document conversion tools based on Python.

Required skills:

• Familiarity with Git or other version-control systems
• Experience with Markdown, HTML, CSS, and XML
• Familiarity with Doxygen or other document generation systems like Java Docs
• Experience with Python or other scripting languages
• Familiarity with MCU C coding terms
• Familiarity with Eclipse or e2 studio IDE (Good to have)
• Knowledge of Drupal web content management system (Good to have)

Qualifications:

• Bachelor's degree in Electrical & Electronics Engineering or Technical Communication is preferred.
  English degree with more than three years’ experience in technical writing field is acceptable.
• Prefereablly have experience in technical writing or technical editing and experience creating small and large documents with MS Word, Markdown, XML, HTML, and PDF.
• Ability to manage and maintain a document conversion system based on source code and Markdown. Systems include git for source version control, Markdown, HTML and PDF. Must be able to maintain and improve conversion scripts in Python and other scripting languages.