Total 38 construction engineer job vacancies in Art / Design / Entertainment category in toa payoh

Job Description:
We are looking for a highly skilled Physical Chip Design Engineer to lead the development of low-power and high-performance chip design processes. This is a critical role that requires deep expertise in advanced semiconductor technologies and the ability to drive full-chip physical design workflows from start to finish.

Key Responsibilities:

• Low-Power Physical Design Workflows: Lead and optimize processes to enhance energy efficiency while maintaining chip performance.
• Full-Chip Floor Planning & Place-and-Route: Oversee floor planning to ensure optimal performance, power, and area. Manage place-and-route processes for efficient, functional designs.
• Power Network Design & Analysis: Design and optimize power distribution networks, perform grid analysis to ensure power integrity and low-power design.
• Timing Closure, Power Integrity, & Signal Integrity: Resolve timing challenges, ensure power and signal integrity signoff, and perform necessary optimizations.
• Physical Verification (DRC & LVS): Conduct thorough physical verification, including Design Rule Checks (DRC) and Layout Versus Schematic (LVS) to ensure compliance with design specifications.

Qualifications:

• Education: Bachelor’s degree or higher in Electronics, Electrical Engineering, Computer Science, or related field. Advanced degrees (Master’s/Ph.D.) are a plus.
• Experience: 4-5 years of hands-on experience in physical design, with expertise in low-power, high-performance chip design. Experience with 12nm and below semiconductor technologies and tape-out processes is essential.
• Technical Skills:
  • Expertise in full-chip floor planning, place-and-route methodologies, and physical verification (including DRC and LVS).
  • In-depth knowledge of power network design, IR drop analysis, and timing closure.
  • Proficiency in Synopsys IC Compiler, Cadence Innovus, or similar tools.
  • Proficiency with Static Timing Analysis (STA) tools.
• Programming Skills: Strong scripting skills in Perl, TCL, Python, and C++.

Job Summary:

We are looking for an Architecture Design Engineer to focus on the development and optimization of AI Chip hardware systems. This highly technical role involves designing simulators, optimizing AI chips at various levels, and developing front-end code to ensure AI chip functionality and performance.

Key Responsibilities:

• Simulator Design:
  Utilize tools like GEM5 to design and develop simulators for AI chips, ensuring accuracy and efficiency in simulating chip behavior across various workloads.
• Performance Optimization:
  Optimize AI chips at:
  • Algorithm Level: Enhance computational algorithms for efficiency.
  • Architecture Level: Design and refine the overall chip structure.
  • Circuit Level: Improve low-level electrical performance.
• Front-End Code Development:
  Write, test, and optimize front-end code for AI chip functionality, ensuring compatibility with the chip’s architecture.

Qualifications:

• Educational Background:
  Minimum Bachelor's degree in Computer Science, Electronics, or a related field. Advanced degrees are a plus.
• Technical Knowledge:
  • Strong understanding of computer architecture and AI hardware accelerators (e.g., GPUs).
  • Familiarity with memory access patterns in AI models and effective memory handling.

Job Description:

We are looking for an Analog Chip Design Engineer to lead the development of digital standard cell libraries and design advanced analog circuits. You will optimize circuit designs, innovate new digital standard cells, and collaborate with cross-functional teams to meet performance, power, and area requirements.

Key Responsibilities:

• Circuit Design & Optimization: Lead analog circuit design, optimize for speed, power, and reliability using Cadence Virtuoso, Spectre, and HSPICE.
• Digital Standard Cell Libraries: Develop high-performance, low-power digital standard cells.
• Innovative Architecture Development: Research and design innovative digital standard cell architectures and explore new logic families and power-saving techniques.
• Collaboration: Work with layout designers to ensure manufacturability, performance, and adherence to DFM/DFT standards.

Qualifications:

• Education: Bachelor’s degree or higher in Electronics Engineering, Computer Science, or related field. Master’s or Ph.D. is a plus.
• Experience: 5+ years in high-performance analog design with expertise in deep sub-micron process technologies (12nm and below).
• Skills:
  • Analog Design Expertise: Proficient in transistor-level design, noise analysis, and power optimization.
  • Tool Proficiency: Experience with Cadence Virtuoso, Spectre, and HSPICE.
  • Digital Standard Cell Design: Experience designing digital cells balancing performance, power, and area.
• Communication: Strong collaboration skills and ability to work in cross-functional teams.

Job role:

1. Works with the front-end design team to complete the chip floorplan , clock

architecture, and powerplan .

2. Takes charge of the physical design tasks from the Netlist to the GDS2, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability (DFR) and tapeout.

3. Researches the physical design methodology of advanced process nodes, and builds an

automatic physical design platform.

Position Requirements:

1. Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.

2. At least 3 years of work experience in the digital backend design field.

3. Hands-on project experience is required.

4. Tapeout experience at advanced technology is prefered.

5. TCL , Perl or Python script development and familiar with EDA tool design will be plus.

• Draughtsmen should be proficient with AutoCAD and 3D modeling software. They should also be able to identify potential operational issues and redesign products to improve functionality.Communicating with architects and engineers, and incorporating knowledge gained into drawings,Preparing, reviewing and redrafting alongside the engineering team.

Job Responsibilities:-

• Utilize in-depth knowledge of Foundation IP to evaluate and qualify IP’s. Able to benchmark and optimize Std cells/IO’s/memory for optimum performance, area or power needs of a project
• Conduct Spice simulations to verify the performance and reliability of designs on RC extracted netlists
• Perform library characterization to ensure accurate timing, power, and area models. Stay up-to-date with industry trends and emerging technologies in library characterization and PPA analysis
• Help to develop and maintain EDA automation scripts to streamline CAD flow and design processes
• Modify and optimize IPQA scripts to improve efficiency and performance
• Analyze and understand both hard and soft IPs within SOC designs. Work with IP vendors to deliver custom specs needed for MXL project needs
• Review silicon reports and provide detailed analysis to identify and resolve issues
• Work closely with vendors and cross-functional teams to ensure successful project outcomes. Collaborate with design teams to ensure seamless integration of libraries and IP blocks
• Maintain comprehensive documentation of IP Vendor engagement. Troubleshoot and resolve issues related to IP, EDA tools and automation flows

Job Requirements:-

• Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or a related field
• Minimum 10 years of experience in design engineering or a related field. Good understanding of the IC design flow, including front-end and back-end processes
• Proficiency in Foundation IP, Spice Simulation, Library Characterization, EDA automation scripts, and IP script modifications. Familiarity with library characterization tools such as Liberate, Cadence Genus, or Synopsys Library Compiler
• Strong ability to review and analyze silicon reports and provide detailed insights. Excellent analytical and problem-solving skills
• Excellent interpersonal and communication skills for effective collaboration with vendors and team members
• Experience with advanced node technologies (e.g., 8nm, 4nm, and below)
• Experience with SOC IP design and verification
• Knowledge of emerging technologies such as FinFET, FD-SOI, or III-V semiconductors
• Familiarity with industry-standard EDA tools and methodologies
• Experience with tools such as Synopsys PrimeTime, Cadence Genus, or Mentor Graphics Questa

Location: Next to Bendemeer MRT

Interested candidates may submit detailed CV with the following info:-

• Current salary, including AWS or Variable Bonus
• Expected salary
• Availability

As a Package Design Engineer within the Package Development and Engineering (PDE) organization in Micron Technology, you will provide package definition and designs for advanced semiconductor devices. You will be working with a multi-functional team across several geographies to create package design databases such as package stack-up, simulation, route-study, substrate/lead frame layout, wire bond diagrams, and other design documentation. You will be ensure the completion of design activities within the project schedule and ensure that design outputs are within Assembly and vendor capability.

Responsibilities will include, but are not limited to:

• Conduct feasibility studies for various package options and assess designs for manufacturability and reliability.
• Work closely with multi-functional team to address packaging design challenge in the area of layout, electrical, thermal, mechanical, assembly and reliability.
• Interact with PDE assembly team and external assembly subcontractor partners to recommend package solutions to meet customer and/or market requirements
• Generate and update assembly documents in database. Provide drafting and drawing support for package drawings, interposer drawings, and manufacturing drawings.
• Support package and DFMEA reviews with assembly engineering and subcon teams.
• Support package technology development, including material selection, process development, DOEs, and related activities
• Support package technology development, including material selection, process development, DOEs (Design of Experiments), and related activities.
• Track and drive program milestones to ensure timely development execution.
• Provide design support for thermal/mechanical/electrical simulation analysis.
• Support and contribute to the Global Design, Simulation and Substrate (GDSS) team on continuous improvement efforts such as:Global design alignment activities
  Continuous improvement efforts
  Package design rules
  Package roadmaps
  Competitive Analysis review

Requirements:

• Master (preferred) or Bachelor of Science degree in Electrical Engineering or Mechanical Engineering with a minimum of 5 years of experience in semiconductor packaging industry OR PhD graduates in Electrical Engineering
• Candidates must possess a strong design knowledge of high-density (Wirebond + Flip-Chip) packaging architectures, die stack-up, packaging layout optimization.
• Excellent communication skills, both oral and written in English.
• Excellent problem solving and analytic skills.
• Experience with Cadence SIP, APD and AutoCAD software tools is preferred.
• Good understanding of Silicon IP, floorplan and Signal/Power Integrity is a plus.
• Ability to work independently, prioritize and manage numerous projects with minimum supervision.
• A global perspective and the ability to work in a multicultural environment.

Performs semiconductor design engineering assignments including engineering and designing packaging stack-up, layout checking, documenting specifications, modifying and evaluating packaging risk in the areas of electrical, thermal, mechanical and reliability. Reviews package design requirements, define the package stack-up and conduct final design review. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor Packaging.

We are seeking an Engineer with Silicon photonics experience to work on photonics integrated chips design and engineering. The scientist will work on device design, photonic circuit and layout with commercial Si photonics fabrication and optical to electronic testing and measurements. In addition, engineer work on advanced packaging knowledge for chip integration.

Responsibilities

• Conduct research and development for Silicon photonics chips
• Design photonics integrated circuit
• Perform optical and photonics simulations and optimization
• Work with Si photonics foundry for fabrication
• Perform optical and electronic measurements

Qualifications

• PhD or Masters Degree in Science and Engineering, Physics or Applied Physics or related discipline to Optics and Photonics
• At least 2 years working experience
• Candidate is expected to be familiar with optical, thermal, multi-physics, and system simulation software (such as Ansys Lumerical, RSOFT, Zemax, and COMSOL) photonic layout software and understanding of Si Photonics fabrication
• Experience with optical and electronic test and measurements
• Commercial Si Photonics product design and product engineering is preferred

• Knowledge of submicron semiconductor technology
• Familiar with digital ASIC/SOC design flow from RTL to silicon characterization
• Familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
• Familiar with design and programming languages: Verilog, System Verilog, Python, Perl, C, C++, etc.
• Familiar with code base management method including subversion, git, GitHub, etc.
• Ability to apply analytical and problem-solving skills
• Strong written and verbal communication skills, ability to negotiate design features and options
• Knowledge of embedded system design, verification, and product development lifecycle
• Deep knowledge and domain know-hows in one or more areas below is a big plus.

Job description

• Experience in UVM verification methodology
• Experience in developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification
• Disciplined, quality-minded, and highly driven for excellence,
• Excellent team player and good communication skills
• MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results
• Candidates with relevant experiences would be offered as Senior or Staff, taking on higher responsibilities

Job Responsibilities:

• Advanced low-power physical design/integration flow development.
• Full-chip floor planning and place & route.
• Power network design and analysis.
• Support signoff timing closure, power integrity, and signal integrity.
• Physical Verification using DRC, LVS.

Requirements:

• Bachelor's degree or above in Electronics, Computer Science, or related fields.
• Experience on high performance and low-power physical design.
• Experience on deep sub-micron process technology (12nm and below) taped outs.
• Excellent interpersonal and communication skills.

Job Responsibilities:

• Schematic capture, optimization and simulation.
• Develop efficient circuit designs and digital STD cell library meeting performance, power and area target.
• Study and invent new digital STD cell circuit architecture.
• Work with a layout designer to implement the layout of circuit.

Requirements:

• Bachelor's degree or above in Electronics, Computer Science, or related fields.
• Experience on high performance and low-power analog design.
• Experience on deep sub-micron process technology (12nm and below) taped outs.
• Excellent interpersonal and communication skills.

Job Description

• Take videography with digital camera/iphone, edit photography and short video shooting (all equipments will be provided)
• ⁠Produce and edit video content (IG Reels / IG Story / Tik Tok videos)
• ⁠Proficiency in videography and photography skills to create content
• Proficient in Capcut
• Stay updated on feature updates of different social medial channels
• Any relevant ad hoc duties assigned as and when required
• Flexible work arrange/timing

Requirements

• Proven work experience as a videographer/social media content creator
• Minimum 1 year working experience in relevant fields
• Proficient in photo and video editing software or other media editing tools
• Creative thinker with a strategic mindset
• Familiar with social media platforms like Facebook, Instagram, Tiktok
• Good time-management skills

Job Responsibilities:

• Advanced low-power physical design/integration flow development.
• Full-chip floor planning and place & route.
• Power network design and analysis.
• Support signoff timing closure, power integrity, and signal integrity.
• Physical Verification using DRC, LVS.

Requirements:

• Bachelor's degree or above in Electronics, Computer Science, or related fields.
• Experience on high performance and low-power physical design.
• Experience on deep sub-micron process technology (12nm and below) taped outs.
• Excellent interpersonal and communication skills.

• Planning, Developing, initiating and managing all phases of projects
• Preparing documentation of critical analysis and providing suggestions for correcting errors
• Collaborating with Project Managers for proper allocation and tracking of resources
• Guiding the workers to do the work properly
• Maintaing the safety in the worksite

Job Responsibilities:

• Schematic capture, optimization and simulation.
• Develop efficient circuit designs and digital STD cell library meeting performance, power and area target.
• Study and invent new digital STD cell circuit architecture.
• Work with a layout designer to implement the layout of circuit.

Requirements:

• Bachelor's degree or above in Electronics, Computer Science, or related fields.
• Experience on high performance and low-power analog design.
• Experience on deep sub-micron process technology (12nm and below) taped outs.
• Excellent interpersonal and communication skills.

In Schneider Electric, everything we do is geared towards advancing progress and sustainability for all—our colleagues, customers, partners, and the communities and societies we serve.

Whether it's through our products, software, and services that propel the digital transformation of energy management and automation, or through our corporate citizenship and volunteer activities, we make a meaningful impact by empowering people and organizations to become more resilient, electric, and digital.

Which is where you come in. Working at Schneider Electric means working toward a cleaner, better world. You're part of a global team built on inclusion, mastery, purpose, action, curiosity, and teamwork, turning sustainability ambitions into actions.

The Role: Electromechanical Design Engineer

What will you do?

• Fulfill technical missions, with autonomy to propose/develop solutions in a technical domain. Work is given through general guidelines.
• In electromechanical & electro technical fields, create, modify, and validate bills of materials and drawings of parts and sub-assemblies, in accordance with technical specifications, customer expectations and supply chain constraints.
• Execute assigned product design - drawings and BOMs (bill of materials) according to the given technical specifications using dedicated tools (Software, database, 2D and 3D CAD system...) in autonomy.
• Apply drawing rules, tolerance analysis, standards (internal and international), project specifications, industrialization internal rules, internal processes.
• Propose improvements (method, tools, product...).
• Support the execution of verification & validation in laboratories and the analysis of results & share reports to internal customers (with possible support).
• Manage the mechanical design evolution of existing products triggered by quality improvement, customization, obsolescence, and adaptation etc.
• Provide product technical support to the plants, industrialization, customer complaints investigation etc.

What qualifications will make you successful for this role?

• Position is available to fresh graduates or 2 to 5 years relevant experience: In design and integration of electronic and mechanical components and their interfacing during the development of electro-mechanical systems.
  - Participate in cross-functional teams to define requirements, analyze feasibility, and propose solutions that meet customer needs.
  - Conduct system analysis to resolve tradeoffs and drive integration of system engineering tools and processes across platforms to optimize performance.
  - Manage resolution of system compatibility and performance issues.
  
• Design background in plastic product design, metal stamping design and die-casting design
• Highly proficient in Computer Aided Design and Engineering (High Creo proficiency required, Solid Works, Unigraphics and Auto-CAD are good for supplemental experience), to model into 2D/3D/Assembly as mandatory requirement in the mechanical design process
• Open-minded and willing to experiment within acceptable boundaries; has a creative mind to bring novel solutions into design and problem-solving
• Experience in one or more of the following fields is an added advantage: Mechanical product design experience for industrial grade products, electromechanical products, optical/lighting products, plastics material selection
  - Proven experience in 3D printing
  - Enclosure design with IP protection
  - ECAD and MCAD integration
  - Familiar with molding, stamping, die-casting fabrication process
  
• Familiar with advanced analytical tool like tolerance analysis, mold-flow analysis, creepage & clearance analysis etc.
• Able to operate various tools/equipment for development like force gauge, high precision measurement equipment, microscope etc.

What's in it for you?

• Global Family Leave
• Comprehensive medical coverage for employee and dependents
• Worldwide Employee Stock Ownership

…and more!

Let us learn about you! Apply today.

• Attend technical meeting/site meetings with consultants, and provide technical solutions
• Study drawings and coordinate architectural works with the consultants and sub-contractors to resolve any technical / site issues
• Ensure architectural works are carried out according to specifications / drawings
• Take lead in sub-con meetings and technical meetings for Arch. related matters
• Inform Project Director / Project Manager on any technical / site problems pertaining to architectural works
• Supervise the progress of architectural works on site
• Coordination of sub-contractor's architectural work and ensuring the work is on schedule
• Other adhoc duties as assigned by the Immediate Supervisor/ Management
• Working experience in the construction industry - HDB project would be an advantage
• Knowledge in prefabricated prefinished volumetric construction (PPVC)
• Knowledge in Singapore Building Codes and Regulations
• Familiar with local standard quanlity implementation, BCA CONQUAS and other Quanlity Mark Assessment

Job Responsibilities:-

• Utilize in-depth knowledge of Foundation IP to evaluate and qualify IP’s. Able to benchmark and optimize Std cells/IO’s/memory for optimum performance, area or power needs of a project
• Conduct Spice simulations to verify the performance and reliability of designs on RC extracted netlists
• Perform library characterization to ensure accurate timing, power, and area models. Stay up-to-date with industry trends and emerging technologies in library characterization and PPA analysis
• Help to develop and maintain EDA automation scripts to streamline CAD flow and design processes
• Modify and optimize IPQA scripts to improve efficiency and performance
• Analyze and understand both hard and soft IPs within SOC designs. Work with IP vendors to deliver custom specs needed for MXL project needs
• Review silicon reports and provide detailed analysis to identify and resolve issues
• Work closely with vendors and cross-functional teams to ensure successful project outcomes. Collaborate with design teams to ensure seamless integration of libraries and IP blocks
• Maintain comprehensive documentation of IP Vendor engagement. Troubleshoot and resolve issues related to IP, EDA tools and automation flows

Job Requirements:-

• Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, or a related field
• Minimum 10 years of experience in design engineering or a related field. Good understanding of the IC design flow, including front-end and back-end processes
• Proficiency in Foundation IP, Spice Simulation, Library Characterization, EDA automation scripts, and IP script modifications. Familiarity with library characterization tools such as Liberate, Cadence Genus, or Synopsys Library Compiler
• Strong ability to review and analyze silicon reports and provide detailed insights. Excellent analytical and problem-solving skills
• Excellent interpersonal and communication skills for effective collaboration with vendors and team members
• Experience with advanced node technologies (e.g., 8nm, 4nm, and below)
• Experience with SOC IP design and verification
• Knowledge of emerging technologies such as FinFET, FD-SOI, or III-V semiconductors
• Familiarity with industry-standard EDA tools and methodologies
• Experience with tools such as Synopsys PrimeTime, Cadence Genus, or Mentor Graphics Questa

Location: Next to Bendemeer MRT

Interested candidates may submit detailed CV with the following info:-

• Current salary, including AWS or Variable Bonus
• Expected salary
• Availability

Job Description：

1. Works with the front-end design team to complete the chip floorplan , clock

architecture, and powerplan .

2. Takes charge of the physical design tasks from the Netlist to the GDS2, including P&R,

formal verification, static timing analysis, physical verification, power analysis, design for

reliability (DFR) and tapeout.

3. Researches the physical design methodology of advanced process nodes, and builds an

automatic physical design platform.

Position Requirements:

1. Holds a bachelor degree or above in electronic engineering, microelectronics, or

computer science.

2. At least 0-2 years of work experience in the digital backend design field.

1. Hands-on project experience is required.

2. Tapeout experience at advanced technology is prefered.

3. TCL , Perl or Python script development and familiar with EDA tool design will be plus.

Job Responsibilities:

• Liaise with sales team, geotechnical team and customers to collect project information
• Preparation of Tunnel Boring Machine (TBM) technical offers (Design Calculations, Datasheet, Scope of supply, Method Statement, and other Supporting Documents)
• Clarification of technical requirements and technical solutions with various subsidiaries
• Order and review technical drawings with Drafting Department
• Participate in development of technical databases
• Provide technical support to sales team and project teams

Job Requirements:

• Bachelor's Degree in Mechanical Engineering
• Some knowledge of TBM technology will be advantageous
• Ideal candidate should be a fast learner and industrious
• Possess good interpersonal and effective communication skill
• Excellent team play who can also work well independently with minimum supervision and results-oriented in a fast-paced environment
• Good written and spoken English, additional language will be an added advantage
• Good computer literacy skills with software like Microsoft and/or windows applications

Job description:

• Coordinate with relevant parties to conduct site survey for the feasibility of Solar PV system installation or on-site technical support.
• Prepare Module arrangement layout, single line diagram, inverter arrangement layout using AUTOCAD. Able to interpret, review and work out design and construction drawings as well as construct 2D drawings in AutoCAD
• Perform PV syst simulation according to design drawings and specification to provide energy yield
• Perform shading analysis using stretch up tool
• Technical review on designs, specifications and operational matters on projects and related activities, through engineering and calculations such as voltage drop, fault current calculation and etc.
• Understand the basic design principles of a solar photovoltaic systems, with sufficient experience working in the industry
• Familiar with solar PV installations for distributed rooftop and utility scale PV projects
• Familiar with design software such as PVSyst, AutoCAD, Sketchup etc.

Requirements:

• Possesses Diploma in Electrical Engineering/Renewable energy related field or equivalent experience. Fresh graduates are welcome.
• Has understanding and knowledge of electrical designs and specifications of High Tension and Low Tension systems.
• Effective team player to ensure timely delivery of work
• Ability to take ownership and work independently under light supervision.
• Enthusiastic, adaptable, and goal-oriented
• Able to contribute and work efficiently as a team member and achieve objectives as a group rather than as an individual

SKILLS/COMPETENCIES & PREFERRED CHARACTERISTICS

• Can-do attitude, problem solver
• Ability to work in Fast Pace Environment
• Knowledge of Microsoft Office and Excel
• Flexible and Willing to learn
• Be a motivated individual who has acquired a good understanding of work ethics and driven to work objectively

• Responsible the package design integration activities by working with cross-functional team and partners for package technology development, including material development, process development, DOEs, and related activities.
• Work with a cross-functional team across several geographies to create package design databases such as package stack-up, wire-bond fanout, route-study, substrate layout, wire bond/Die placement diagrams, and other design documentation.
• Work with Business Unit Package Design Lead and cross-functional team to establish a Packaging Roadmap.
• Contribute to package design rules and system development.
• Participate in packaging IP development activates and industry benchmarking.
• Work with Substrate and PCB (Printed Circuit Board) suppliers, OSATs (Outsourced Semiconductor Assembly and Test), and other ecosystem partners to meet their requirements with packaging solutions.

Requirements:

• Bachelor of Science degree in Electrical Engineering or Mechanical Engineering with a minimum of 7 years of experience in semiconductor packaging industry.
• Candidates must possess a strong design knowledge of high-density (Wirebond + Flip-Chip) packaging architectures and die stack-up.
• Excellent communication skills, both oral and written in English.
• Excellent problem solving and analytic skills.
• Experience with Cadence SIP, APD and AutoCAD software tools is preferred.
• Good understanding of Silicon IP, floorplan and Signal/Power Integrity is a plus.
• Ability to work independently, prioritize and manage numerous projects with minimum supervision.
• A global perspective and the ability to work in a multicultural environment.

Job Responsibilities:-

• Responsible for pre-silicon RTL coding of block, subsystem and top level SOC Integration
• Develop robust and reusable Code and ensure VHDL or Verilog implementation enables readiness for Verification, Synthesis, DfT and Low Power Insertion
• Develop reusable RTL Code, using Generic and Modular Coding Styl
• Contribute to verification plan from specification and in coordination with architects
• Collaborate on Timing constraints, Testability and Insertion of Low Power Structure such as Power gating, Isolation and Retention Sequential Elements
• Own Linting, CDC, RDC and collaborate with Verification Team and Physical Design
• Co-work with Architecture/ Design/Validation/SW teams. Own cross functional micro-architecture and implementation and drive issues to closure

Job Requirements:-

• Bachelor Degree or Master's in Electronics Engineering with 8 to 10 years and above of related working experience
• Expert in VHDL and Verilog Coding, Front End Design using best-in-class methodology and Micro-architecture
• Good experience in developing Multi-Million gates IP and integrated heterogenous complex SoC, including Analog and Mixed Signal IP
• Participated in Micro-architecture Specification
• Familiar with Hardware-Software Partitioning, Multi-CPU and Multi-Core Architecture
• Deep knowledge and understanding of NoC and multi-layer complex Interconnect Systems
• Solid verification skills in problem solving, constrained random testing and debugging
• Deep understanding of design architecture and possess meticulous attention to details
• Expertise with Code Linting tools and Static Code checker such as Spyglass, Real Intent, etc
• Expertise in IP-XACT, Connectivity Checks, Register Interfaces and RTL Assembly Tools
• Programming experience in C/C++/assembly/SVA
• Good experience in working with ARM and ARM Eco-system, AXI, AHB, SERDES systems, communication peripherals(UART, I2C, SPI) and power management
• Experience in WiFi/DOCSIS/Ethernet/DSP/DDR is a plus
• Setup Automated regressions environment and in general automate repetitive verification tasks to enhance productivity
• Strong team player and communicator

Location: Next to Bendemeer MRT

Interested candidates may submit detailed CV with the following info:-

• Current salary, including AWS or Variable Bonus
• Expected salary
• Availability

Our Working Culture

We are all about the new and the bold. Embracing individuality while encouraging innovation, we meld dynamic minds with strong ethics to put forth our finest work wherever we are, whatever we do. In a fast-paced world full of interesting challenges, we strive to give only the best solutions.

Why Join Us?

We believe that the best ideas come from a diversity of thought. If you are a critical thinker looking for a fulfilling career, then look no further. Join us at Vanguard and redefine your daily grind with our easily accessible office, flexible working hours, and wide range of retail, furniture, and F&B discounts.

CORE DUTIES & RESPONSIBILITIES

• Strong passion in Interior Design
• Formulate design concept and write-up, under the guidance of lead designers
• Provide 2D drawings in AutoCAD for design development and construction
• Provide 3D perspective in Sketch-up or 3D Max for client presentation
• Support in preparing design presentations in power point format
• Able to handle design coordination with clients, contractors, suppliers
• Ensure adherence to project timelines and budget constraints.
• Maintain clear and effective communication with team members, clients

SKILLS, EXPERIENCE & COMPETENCIES REQUIRED

• Diploma or Degree in Interior Design or related field.
• Proficiency in design software such as AutoCAD, SketchUp, Photoshop or similar.
• Strong attention to detail and ability to multitask effectively.
• Excellent communication skills, both verbal and written.
• Ability to work collaboratively in a team environment.
• Basic knowledge of materials, finishes, and furnishings used in interior design.
• Passion for creativity and a keen eye for design aesthetics.
• Prior internship or work experience in interior design is preferred.
• Familiarity with building codes and regulations is a plus.
• Must be willing to learn and adapt to new challenges.