Total 2,195 Science / R&D / Research job vacancies in potong pasir north east

Job Description:

Candidate will be part of Far-Backend Of Line (Far-BEOL) team of process module engineers, advancing specialty technologies at IME. His or her main roles and responsibilities include:

• Develop and support Chemical Mechanical Planarization (CMP) unit process capabilities for silicon photonics, flat optics, advanced packaging, MEMS, and wide bandgap semiconductor applications.
• Deliver innovations involving process methodologies, materials, or approach, and generate intellectual property related to various aspects of CMP.
• Participate as team member with process integration teams to actively support CMP process development, optimization and troubleshooting for various industry and grant projects.
• File patents/know-hows on new development activities.
• Publish research findings in prestigious journals and conferences.

Job Requirement:

• Masters with specialization in Electronics / Microelectronics / Materials Engineering / Chemical Engineering / Materials Science/ Chemistry / Physics or equivalent.
• Minimum 5 years of experience in CMP technologies, preferably in an industrial setting.
• Prior hands-on experience working on industry-scale 200 mm or 300 mm CMP equipment platforms (e.g., AMAT or Ebara platforms), with in-depth technical knowledge in process development, materials, and inline process control related to CMP.
• Knowledge of silicon photonics, advanced packaging, MEMS, or wide bandgap semiconductor technology platforms would be a plus, but not mandatory.
• Strong experimental design (DOE) and data analysis skills is preferred.
• Good interpersonal and strong demonstrated skills in collaborating with internal and external stakeholders.
• At least 2 years of demonstrated experience in managing projects of moderate complexity is preferred
• Good analytical skills and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.
• Self-driven with strong interest in next-generation applications of CMP technologies and industry trends.

Role & Responsibilities:

• Responsibilities include diagnosing appropriate levels of metal/metal-alloy contaminations by oxygen and other contaminants; determining the root cause of contaminants, and establishing protocols for characterizations.
• Hands-on providing support for onsite metal PVD, including creating, running, and characterizing recipes to achieve the lowest resistances.
• Collaborates closely with equipment vendors and device engineers to optimize the metal-stack for device performances and robustness/reliability, from low to high temperatures.
• Lead data analysis related to implant-induced defects and cleaning issues on metal contacts with solutions development.
• Examines the work-functions of metal/metal-alloys suitable for Ohmic contact on SiC.
• Responsible for designing experiments for Ohmic contact on various SiC substrates with different doping types, determining their impact, and resolving issues to achieve the lowest specific contact resistances.
• Designing cleaning processes to obtain ideal Schottky diode using various metal/metal-alloys on SiC for high-performance applications.
• Work closely with cross-departmental and integration teams and in 3-5 years’ time develop a WBG backend process integration team of at least 4 persons.

Requirements:

• PhD Degree in Material Science, Physics, Electrical Engineering or related field.
• >8 years related industrial experience inclusing backend process module integration.
• Extensive hands-on experience in PVD (Physical Vapor Deposition) processing for metal depositions and interface tuning.
• Strong understanding of metal-semiconductor contact physics.
• Expertise in work-function tunings of metal and metal-alloy.
• Proficiency in modulating electron affinity through implantation or surface treatments of semiconductors.
• Familiarity with wide band-gap semiconductor materials and their interaction with metal/metal-alloys at various temperatures.
• Thorough fundamentals in Ohmic contact and Schottky diode physics, as well as the impact of defects and contaminations on electrical properties.
• Skilled at mentoring and transferring knowledge to junior staff members.
• Excellent communication skills to effectively address customers' needs, concerns, and solution requirements.

Job Description:

Be part of an exciting Team working on cutting-edge advanced packaging process technologies. Partner and work with various FAB users, to always enable smooth operations and develop packaging solutions and taking the solutions from concept to production. Responsibilities will also include assisting in operations support in FAB clean rooms to make sure all rounded supports are provided.

This position is based in Singapore.

Responsibilities:

• Looking for a reliable, agile, and professional individual.
• Oversee the Team spare/ chemicals / inventories stores – upkeep with good house-keepings, periodic cycle counts. Maintain the inventory database, ensuring timely and accurate recordings, raise purchase requests accordingly.
• Take charge and provide day to day supports in all logistics needs and initiate material/spare parts procurement when required to ensure smooth Fab operations.
• Accountable for the inventory movements required to enable smooth lot operations across IME Premises.
• Follow through the orders from the start of purchase till delivery and to ensure that goods are delivered are on time.
• Work seamlessly with various stakeholders to provide logistics support and deliver inventory on time.
• Work towards and employ critical thinking, put-up good initiatives to move forward to digitalization.
• Ability to work in a multi-task environment.

Experience:

• Education: Diploma in engineering discipline. Preferably in supply chain logistic/ warehouse operations.
• At least 2 years of warehouse operations.
• Preferably some experience in semiconductor / manufacturing environment, with good wide contacts with semiconductor material suppliers, equipment vendors.
• Strong knowledge-based on excel skills and some knowledge of supply chain analytics.

Candidate will be required to develop, secure and manage industry partnerships for the NGTC. Candidate should stay updated on RF/mmWave GaN market trends and conduct thorough market research and competitive analysis on companies, competitors and the market for actionable insights. This may involve conducting SWOT analyses to enable NGTC to come up with a strategic plan to optimise business and research collaborations.

Candidate will also be responsible for developing and executing marketing strategies to promote NGTC’s capabilities to interested parties.

Candidate will be required to work alongside various internal and external stakeholders and teams to develop NGTC’s strong value propositions and assist with market intelligence to shape the NGTC’s strategies.

Candidate will be required to carry out account management of companies for NGTC to strengthen customer relationships.

Candidate will be required to coordinate and engage with internal stakeholders such as A*STAR’s Industry and Enterprise Group, Institute of Microelectronics or various other public sector agencies.

Requirements:

• Degree in Science or Engineering
• Minimum 5 years of relevant working experience, preferably with a background in GaN technology and industrial commercialization.
• Able to structure and negotiate collaboration agreements.
• Strong analytical skills.
• Strong communication (written and verbal), marketing and interpersonal skills.
• Results oriented, pro-active, and a team player.
• Adaptable and comfortable working in a fast-paced and fast-changing environment.
• Passion to develop Singapore’s semiconductor ecosystem.

As an Equipment Engineer, you will own all assigned toolsets. The preferred candidate can troubleshoot difficult and poorly defined problems related to mechanics, electronics, and processes using tool knowledge/experience, SPC, schematics, and other available resources. The candidate will collaborate extensively with the area maintenance team and process engineering. Some collaboration will be with tool vendors, other area engineers/managers, procurement, and production.

Responsibilities:

• Provide technical leadership and management of 200MM and 300MM Semiconductor processing equipment in Support of Main Stream Semiconductor Processes and Advanced Packaging processes. Highly desirable for a candidate to have a background in at least one of the following areas: Photolithography, PVD and CVD Thin Films, Dry Etch, Wet Etch /Wafer Clean, Diffusion, Bond, Electroplate (ECD), CMP, or Metrology (some areas may be combined).
• Work with process engineering to drive root-cause corrective actions for equipment failures, implement permanent solutions, and eliminate chronic and long-term down events.
• Lead continuous improvement teams to drive tool matching, availability, and throughput improvements and reduce risk.
• Management of new tool installation, start-up, and tool upgrades to increase fab capability and capacity, lower costs, and improve yields.
• Work with minimal supervision, balancing competing priorities, to serve the needs of the Maintenance, Production, and Development organizations.
• Participate in cross-functional teams that create efficiencies across all layers of the organization.

Required Qualifications

• Degree / Diploma with 10+ years of relevant Semiconductor Industry Experience in Mechanical, Electrical, or Chemical Engineering, Materials Science, Physics, or another relevant Engineering discipline.
• 6+ years of experience within the respective areas of expertise. Experience should include one or more: Semiconductor Wafer Handling, RF Power, High Vacuum, Toxic Gas Delivery systems, Precision Optics, and Wet Chemistry.
• Demonstrated experience with the application of structured problem-solving methodology.
• Positive interpersonal skills, highly energetic and self-motivated.
• Demonstrated ability to meet requirements and deliver results.
• Ability to manage and execute multiple projects simultaneously and shift priorities to meet business needs.

Preferred Qualifications

• Diploma or Bachelor of Science/Engineering in Mechanical, Electrical or Chemical Engineering or Materials Science, Physics or other relevant Engineering discipline.
• Semiconductor Wafer Handling, RF Power, High Vacuum, Toxic Gas Delivery systems, Precision Optics, Wet Chemistry.
• Positive interpersonal skills, highly energetic and self-motivated.
• Experience with Automated Fault Detection and Classification Systems (FDC).
• Strong background with utilizing SPC.
• High level of understanding of equipment component behaviour.
• Experience Integrating Equipment Maintenance Management Software

Scientist/Senior scientist will be part of heterogeneous integration group focused on development of the quantum packaging technology platforms to integrate qubit and control chip on superconductivity interposer.

He/she will work with cross functional team to:

• Design and simulation of superconducting circuits for salable quantum processor in 3D flip-chip architecture.
• Explore and develop superconducting nanowire base photo detector.
• Design and layout of circuits components of a superconducting qubit.
• Develop design rules and PDK for quantum packaging technologies.
• Provide quantum packaging solutions to meet the system requirements based on the simulation results.
  Prepare competitive grant research proposals and lead execution of these proposals.
  Engage industry partners to align and develop the building blocks required for next generations quantum packaging platforms.

Job Requirements:

• Master/PhD in quantum computing; Electrical and Computer Engineering; Material science area
• 4 to 5 years’ experience in superconducting circuits design and simulation for scalable quantum processor. Deep understanding on 3D quantum package
• Working experience on measuring loss and dielectric constants of materials at cryogenic temperatures
• Strong communication, industry awareness, and problem-solving skills.
• Highly motivated to succeed, a self-starter who is driven and able to work with others effectively to get things done.

ROLE:

IME A*Star is currently working on establishing a hybrid fabrication platform for 150mm & 200mm Silicon Carbide (SiC) power MOSFETs as part of the new SiC R&D program. The main objective of this program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration for various types of power MOSFETs and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, with a specific focus on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this deputy lead for wide-bandgap device integration role include the development and integration of several modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, ohmic contact formation etc are essential. We are actively looking for individual with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, device layout design, design verification, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• To lead development of SiC power technologies, serving as both front and back-end process integration in collaboration with advanced module development team. And aim
to grow this team to ~10 headcounts in the next 3 years.

• Optimize and customize process flows for individual SiC products

• Identify and resolve process integration issues and related problems

• Develop specific or derivative processes to meet customer needs

• Support new designs by conducting module characterization and developing effective design rules

• Define and implement measures to enhance stability, yield, reliability, and reduce development costs & time

• Plan and implement sustainable corrective actions to address process deviations

• Continuously monitor and utilize expertise in process and equipment capabilities to achieve optimal device performance

• Determine the correct and effective way to deliver processes, functional devices, and other items to multiple customers

• Perform project management tasks and conduct data analysis

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device Physics

• Highly proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and MOSFET device physics

• Proficient in teaching and knowledge transfer to junior staff members

• Strong communication skills to effectively convey information about process module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data; combined with strong presentation abilities.

ROLE:

A*Star-IME is currently working on establishing a hybrid fabrication platform for 150mm and 200mm Silicon Carbide (SiC) power MOSFETs as a new pillar on Singapore"s Future of Microlectronics in wide-bandgap. The main objective of this SiC RnD program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, specifically focusing on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this role to be successful include the development and integration of several process modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, and ohmic contact formation. We are actively looking for individuals with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• Lead develop process technology for SiC power MOSFETs and ensure it meets the requirements for prototyping manufacturing

• Collaborate with advanced process module development team to establish a process flow for fabricating specific MOS devices

• Responsible to develop and improve test structures that enable fast and rigorous characterization of process

• Accountable to improve device performance and yield through the design, execution, and analysis of experiments for each specific device and product

• Work with cross-functional teams to minimize defects and address technical and yield concerns

• Drive CIP (Continuous improvement plans) to deliver integrated process modules and specific device per project goals

• Make decisions regarding the delivery of process, active and passive devices to multiple customers

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device physics

• Proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and the physics of MOSFET devices

• Strong communication skills to effectively communicate information about module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data, coupled with strong presentation abilities

As part of IME Integrated Circuit Design and System Department, we are seeking a candidate with relevant experience in analog integrated circuit design. This candidate will have the opportunity to develop unconventional ultrasound transducer drivers, receiver circuits for IoT and biomedical applications as well as cutting-edge high-speed analog circuits for advanced optical communication.

Role & Responsibilities

• Design and tapeout circuit blocks e.g. high linearity low-noise amplifier, variable gain amplifier, envelop detector, and high voltage driver for MEMS ultrasound transducers.
• Work together with team on system integration and demonstration.
• Work together with team to investigate novel circuit/system solutions to create new inventions.

Requirements

• Master’s / PhD degree in Electrical Engineering or equivalent
• Minimum 2 years of transistor-level analog circuit design experience
• Good understanding of CMOS analog IC design methodologies and successful tapeout experience
• Familiar with analog IC design and verification flow
• Design experience with high voltage BCD process would be a plus
• Familiar with the IC test equipment such as oscilloscope, spectrum analyzer, etc.
• Able to generate high-quality scientific publications and patents
• Team player, quick learner and self-driven

Job Description:

• Develop epitaxial processes for selective and non-selective growth of Ge and SiGe layers on Si substrates.
• Improve baseline processes for high-quality SiGe and Ge epitaxy: control uniformity and thickness and minimize threading dislocation density.
• Design epitaxial structures and develop processes for Ge and SiGe photodetectors (PD) and electro-absorption modulators (EAM) devices, integrating Ge/SiGe devices into Silicon photonic circuits.
• Troubleshoot to maintain tool and process quality. Prepare Standard Operating Procedures (SOPs), Out-of-Control Plans, and other technical documentation to maintain processes and tools.
• Perform metrology and characterization of SiGe and Ge epilayers (e.g., dopant and thickness uniformity, surface roughness, crystal quality, stress, carrier lifetime, etc.).
• Correlate SiGe and Ge crystal defects (type and density) with device performance and yield, and with device processing conditions.
• Provide technical support for technology transfer and process release requirements.
• Prepare technical presentations and papers for meetings, conferences and journals.

Requirements:

• PhD degree in Materials Science and Engineering, Physics, Chemical Engineering, Chemistry, Microelectronics Engineering, or closely related fields are welcome to apply.
• Prior 3 to 5 years direct experience in SiGe/Ge epitaxy and materials characterization.
• Working knowledge and prior hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, and problem-solving methods, is desired.
• Understanding of epitaxial system hardware is advantageous.
• Knowledge and prior hands-on experience on basic process characterization techniques such as SEM/TEM, EDX, SIMS, AFM, Ellipsometry is advantageous.
• Possess good interpersonal and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.

Job Description:

• Develop epitaxial processes for selective and non-selective growth of Ge and SiGe layers on Si substrates.
• Improve baseline processes for high-quality SiGe and Ge epitaxy: control uniformity and thickness and minimize threading dislocation density.
• Design epitaxial structures and develop processes for Ge and SiGe photodetectors (PD) and electro-absorption modulators (EAM) devices, integrating Ge/SiGe devices into Silicon photonic circuits.
• Troubleshoot to maintain tool and process quality. Prepare Standard Operating Procedures (SOPs), Out-of-Control Plans, and other technical documentation to maintain processes and tools.
• Perform metrology and characterization of SiGe and Ge epilayers (e.g., dopant and thickness uniformity, surface roughness, crystal quality, stress, carrier lifetime, etc.).
• Correlate SiGe and Ge crystal defects (type and density) with device performance and yield, and with device processing conditions.
• Provide technical support for technology transfer and process release requirements.
• Prepare technical presentations and papers for meetings, conferences and journals.

Requirements:

• PhD degree in Materials Science and Engineering, Physics, Chemical Engineering, Chemistry, Microelectronics Engineering, or closely related fields are welcome to apply.
• Prior 3 to 5 years direct experience in SiGe/Ge epitaxy and materials characterization.
• Working knowledge and prior hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, and problem-solving methods, is desired.
• Understanding of epitaxial system hardware is advantageous.
• Knowledge and prior hands-on experience on basic process characterization techniques such as SEM/TEM, EDX, SIMS, AFM, Ellipsometry is advantageous.
• Possess good interpersonal and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.

ROLE:

IME A*Star is currently working on establishing a hybrid fabrication platform for 150mm & 200mm Silicon Carbide (SiC) power MOSFETs as part of the new SiC R&D program. The main objective of this program is to advance 200mm SiC technologies in various areas, such as epitaxy, device design, process integration for various types of power MOSFETs and power module packaging. The ultimate aim is to drive disruptive innovations in power device research, with a specific focus on >1.7KV power MOSFETs. These innovations will have significant applications in enhancing automotive technologies, vehicle electrification, safety measures, sustainable energy grids, data centers, and industrial & aerospace automation. Key aspects for this deputy lead for wide-bandgap device integration role include the development and integration of several modules, such as gate oxidation, implantation, implant activation, layout design verification, lithography, ohmic contact formation etc are essential. We are actively looking for individual with extensive industry experience in device physics and process integration to join our team. The candidate will contribute to process integration, device layout design, design verification, E-test and module process related data analysis, yield enhancement, and device physics.

RESPONSIBILITIES:

• To lead development of SiC power technologies, serving as both front and back-end process integration in collaboration with advanced module development team. And aim
to grow this team to ~10 headcounts in the next 3 years.

• Optimize and customize process flows for individual SiC products

• Identify and resolve process integration issues and related problems

• Develop specific or derivative processes to meet customer needs

• Support new designs by conducting module characterization and developing effective design rules

• Define and implement measures to enhance stability, yield, reliability, and reduce development costs & time

• Plan and implement sustainable corrective actions to address process deviations

• Continuously monitor and utilize expertise in process and equipment capabilities to achieve optimal device performance

• Determine the correct and effective way to deliver processes, functional devices, and other items to multiple customers

• Perform project management tasks and conduct data analysis

REQUIREMENTS:

• MS/PhD Degree in Electrical Engineering or related field

• >3 years industrial experience for MOSFET process integration and device Physics

• Highly proactive, self-motivated, and results-oriented professional with the ability to make efficient contributions to and lead technical discussions

• Extensive expertise in material and process integration

• Comprehensive understanding of semiconductor materials and MOSFET device physics

• Proficient in teaching and knowledge transfer to junior staff members

• Strong communication skills to effectively convey information about process module integration for device fabrication and with customers

• Excellent analytical skills for interpreting process and device data; combined with strong presentation abilities.

We are looking for a Research Scientist / Senior Research Scientist to work on a project on developing all-optical neuromorphic computing system. This project is looking to develop on-demand light-matter interaction technology with atomically-thin materials for waveguide optical signal control. The successful candidate will be expected to work under the guidance of the principal investigator and publish in high-quality peer-reviewed scientific journals.

The selected candidate will have access to excellent scientific resources and opportunities for future career development (e.g. presentations at conferences, opportunities for grant applications, advanced training courses, etc.).

Job Requirements:

• PhD degree in Nanophotonics, Applied Physics, Optics, Materials Science or a related field.
• Experience in simulation, design, and characterization of nanophotonic/optical device.
• Experience in the exfoliation, transfer, and characterization of vdw materials.
• Knowledgeable in nanofabrication process for optoelectronic devices.
• Prior experience in optical system design, assembly and alignment will be an advantage.
• Demonstrated ability in developing high-quality, peer-reviewed scientific journal publications

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

We are looking for a Research Scientist / Senior Research Scientist to work on a project on developing all-optical neuromorphic computing system. This project is looking to develop on-demand light-matter interaction technology with atomically-thin materials for waveguide optical signal control. The successful candidate will be expected to work under the guidance of the principal investigator and publish in high-quality peer-reviewed scientific journals.

The selected candidate will have access to excellent scientific resources and opportunities for future career development (e.g. presentations at conferences, opportunities for grant applications, advanced training courses, etc.).

Job Requirements:

• PhD degree in Nanophotonics, Applied Physics, Optics, Materials Science or a related field with at least 5 years' of relevant experience.
• Experience in simulation, design, and characterization of nanophotonic/optical device.
• Experience in the exfoliation, transfer, and characterization of vdw materials.
• Knowledgeable in nanofabrication process for optoelectronic devices.
• Prior experience in optical system design, assembly and alignment will be an advantage.
• Demonstrated ability in developing high-quality, peer-reviewed scientific journal publications

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Interested applicants are invited to apply directly at the NUS Career Portal

Your application will be processed only if you apply via NUS Career Portal

We regret that only shortlisted candidates will be notified.

Job Description

The Research Engineer will be involved in developing computer models for assessing climate change impacts on marine ecosystems. He/she will also be involved in collecting field data for calibrating and validating model systems. In addition to the above, the Research Engineer is expected to also participate actively in research meetings, present research findings, write reports and research papers.

Job Requirements

• Possess at least a good Bachelor’s degree in Civil and/or Environmental Engineering or equivalent.
• Experience in computational modelling in environmental engineering or climate change is preferred.
• Open to fixed term contract

Job Description:

• Be a member of the leadership team to achieve the vision and mission of the National GaN Technology Centre (NGTC).
• Lead the Technology, Engineering and Industry team in technology road mapping and R&D pathfinding in device architecture, fabrication process technology, and MMIC design.
• Lead the Technology team, which comprises (a) characterization & modelling, (b) MMIC design, testing & model validation, (c) device failure and reliability analysis, (d) ultra high frequency GaN-on-SiC device design, layout, fabrication and characterization, and (e) low voltage GaN-on-Silicon device design, layout, fabrication and characterization.
• Coordinate with the Engineering team to develop ultra high frequency devices, ultra low voltage devices, and their MMICs.
• Coordinate with the Engineering and Operations teams to ensure timely delivery of the projects.
• Initiate and secure research grants and industry funding.
• Initiate, coordinate and manage research collaborations with IHLs and industry partners.
• Provide regular progress report of the Technology team’s activities to NGTC management.
• Represent NGTC in customer meetings.

Requirements:

• PhD in Electrical & Electronic Engineering, Materials Science and Engineering, Microelectronics Engineering, or closely related fields are welcome to apply.
• Deep understanding of GaN-HEMT device physics and GaN-based MMICs.
• At least 15-20 years of post-PhD hands-on experience in GaN HEMT and MMIC technology development including design, characterization (e.g. DC, small-signal and load-pull measurement), and modelling; preferably in RF GaN-on-Silicon or GaN-on-SiC technologies.
• At least 8 years of experience in leading a team of research engineers/scientists in managing multiple projects.
• Candidates with industry experience in GaN related R&D would be preferred.
• Working knowledge and hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, problem-solving methods, and in-line metrology techniques is desired.
• Possess strong leadership, project management, interpersonal and oral/written communication skills.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Singapore University of Technology and Design immediately invites applications for multiple Research Assistant positions to work in Singapore, in the following areas:

• Robust perception, planning, and control for field robots
• Simultaneous localization and mapping
• Experimental robotics
• Novel mechanism synthesis and analysis
• Electromechanical system design experience is strongly preferred

Your primary responsibilities include:

• Designing and developing reconfigurable robotic platforms to achieve project goals and KPIs (spanning surveillance, maintenance, and payload-carrying robot platforms)
• Implementing and researching specifications for various subsystem components, component analysis, designing for durability, maintainability, and estimating physical constraints required to achieve expected functionality and reconfigurability .
• Have a good understanding of the electrical system of the robot so as to optimize the mechanical designs
• Have a strong understanding of the PCB design and fabrication
• Have a strong understanding of different manufacturing processes and manufacturing constraints
• Designing mounts for onboard sensors and computing equipment with consideration for dust and waterproof requirements
• Simulating using CAD Solidworks for FEA analysis and Keyshot demonstration
• Experience with electrical and electronic components and the use of fabrication and soldering set is strongly preferred
• Able to effectively communicate ideas and take constructive criticism
• Able to effectively work in a multi-disciplinary team and with third-party vendors

The position requires a B.Eng/M.Eng./M.Sc. in Engineering Product Development/Information System/ Mechanical/Electrical and Electronics/Computer Engineering or a related area.

Candidates are expected to possess experience in field robotic systems as evidenced by developmental project experiences/publications. Strong commitment to research and development is essential.

As part of IME’s Photonics & Sensors Department, the candidate will take lead of the development of various testing capability for advanced photonics, including but not limited to chip-level and wafer-level testing of optical devices and electro-optical devices at high RF frequencies, as well as the testing of electro-optical sub-modules and sub-systems. You will work closely with an excellent multidisciplinary team working on advanced photonics.

Responsibilities:

• Develop various photonics testing capabilities for both chips and wafers, including design and building of measurement setups
• Perform chip-scale and wafer-scale data collection for OE, EO and OO devices from frequency range of 0 to 110 GHz
• Optimize data acquisition and analysis process to improve test efficiency, e.g. automation of measurement processes for wafer-scale testing and corner analysis
• Manage photonics laboratory including facilities, health and safety, equipment calibration, inventory and stocktake
• Take the lead to procure laboratory equipment and consumables
• Prepare technical presentations and papers for internal meetings, as well as conferences and journals
• Collaborate with project team to ensure quality and on-time delivery for various projects
• Performs other duties as assigned.

Qualifications:

• Bachelor’s or master’s degree in Physics, Electronic/Electrical Engineering, Photonics, Opto-electronics or equivalent
• More than 3 years hands-on experience in active photonics/optoelectronic device testing, especially for high-speed optical modulator and photodetector devices and electronic-photonic integrated circuit.
• More than 3 years hands-on experiences in optical setup construction and semiconductor & optoelectronic device characterization
• Experienced on experimental data acquisition and analysis
• Skillsets in programming or instrument automation is a plus
• Strong skills in problem-solving, communication and providing technical presentations
• Industry experience and awareness is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Job Description:

Candidate will be part of Far-Backend Of Line (Far-BEOL) team of process module engineers, advancing specialty technologies at IME. His or her main roles and responsibilities include:

• Develop and support Chemical Mechanical Planarization (CMP) unit process capabilities for silicon photonics, flat optics, advanced packaging, MEMS, and wide bandgap semiconductor applications.
• Deliver innovations involving process methodologies, materials, or approach, and generate intellectual property related to various aspects of CMP.
• Participate as team member with process integration teams to actively support CMP process development, optimization and troubleshooting for various industry and grant projects.
• File patents/know-hows on new development activities.
• Publish research findings in prestigious journals and conferences.

Job Requirement:

• Masters with specialization in Electronics / Microelectronics / Materials Engineering / Chemical Engineering / Materials Science/ Chemistry / Physics or equivalent.
• Minimum 5 years of experience in CMP technologies, preferably in an industrial setting.
• Prior hands-on experience working on industry-scale 200 mm or 300 mm CMP equipment platforms (e.g., AMAT or Ebara platforms), with in-depth technical knowledge in process development, materials, and inline process control related to CMP.
• Knowledge of silicon photonics, advanced packaging, MEMS, or wide bandgap semiconductor technology platforms would be a plus, but not mandatory.
• Strong experimental design (DOE) and data analysis skills is preferred.
• Good interpersonal and strong demonstrated skills in collaborating with internal and external stakeholders.
• At least 2 years of demonstrated experience in managing projects of moderate complexity is preferred
• Good analytical skills and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.
• Self-driven with strong interest in next-generation applications of CMP technologies and industry trends.

Position:

Our team is starting an exciting project to develop RF/mm-wave ICs for the future of communication for Beyond-5G to 6G applications. We are looking for an exceptional candidate with relevant expertise to join us. Our team focuses on developing communication modules for both terrestrial and non-terrestrial needs. You will work at the Institute of Microelectronics (IME) to create the most advanced semiconductor technologies. You will collaborate with world-leading industries and academic institutions on innovative designs and strategic intellectual properties.

Job Responsibility:

• Benchmarking with datasheets, prior arts, and latest academic work.
• In-depth design and analysis with electrical/electromagnetic simulations.
• In-depth analysis of design robustness, optimization, and testability.
• In-depth presentations and report recording of design, layout, test and measurement, and fault analysis.
• Working independently, as a team, and with collaborators from industry and academic backgrounds.

Pre-requisites:

• A Master’s / PhD Degree in Electronics or Electrical Engineering and proven academic and industry experience are pluses.
• Experienced in designing RF/mmWave such as LNA, mixer, PA, buffer, transmission line, baluns, PLL, VCO, etc.
• Experienced in designing base-band/mixed-signal circuits, such as amplifiers, bandgap, ADC, DAC, etc., is a plus.
• Knowledgeable in design trade-offs at the circuit-level specification.
• Experienced in designing in CMOS and SiGe technology or any other technologies like RF-SOI and compound-semiconductor is a plus.
• Proficient in using Cadence and EM tools like ADS for EM circuit simulation, IC layout, LVS, and DRC verification.
• Familiarity with IC measurement and debugging and hands-on experience with RF/mmWave equipment such as spectrum analyzer, network analyzer, oscilloscope, and probe station.
• Good publication record with a strong awareness of state-of-the-art.
• Good communication and teamwork.

Responsibilities:

• Engage and manage various stakeholders (internal and external) expectations and communication.
• Collaborate with functional teams to conduct cleanroom/facility planning and layout
• Carry out physical area/ floor marking, coordinate with functional teams in tool purchase, movement (in/out), tool relocation plan, project timeline and capacity update.
• Perform risk analysis of various project options and outcomes
• Maintain and validate capacity/capital/space models to enable accurate assessment of wafer fabrication and operations loading needs
• Support operational efficiency improvement efforts (cycle time, OEE improvement, capacity optimization, space optimization)

Requirements:

• Degree in Engineering (Industrial & Systems Engineering), Mechanical, or relevant field;
• Proficient in AutoCAD 2D/3D and Simulation Tool preferred
• Proficient with Microsoft Words, Excel and PowerPoint proficiency
• Preferably to have industrial engineering experience in a semiconductor/ manufacturing environment
• Ability to work independently and team player to deliver in fast paced and collaborative environment

Responsibilities:

• Engage and manage various stakeholders (internal and external) expectations and communication.
• Collaborate with functional teams to conduct cleanroom/facility planning and layout
• Carry out physical area/ floor marking, coordinate with functional teams in tool purchase, movement (in/out), tool relocation plan, project timeline and capacity update.
• Perform risk analysis of various project options and outcomes
• Maintain and validate capacity/capital/space models to enable accurate assessment of wafer fabrication and operations loading needs
• Support operational efficiency improvement efforts (cycle time, OEE improvement, capacity optimization, space optimization)

Requirements:

• Degree in Engineering (Industrial & Systems Engineering), Mechanical, or relevant field;
• Proficient in AutoCAD 2D/3D and Simulation Tool preferred
• Proficient with Microsoft Words, Excel and PowerPoint proficiency
• Preferably to have industrial engineering experience in a semiconductor/ manufacturing environment
• Ability to work independently and team player to deliver in fast paced and collaborative environment

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

As part of IME’s Photonics & Sensors Department, the candidate will take lead of the development of various testing capability for advanced photonics, including but not limited to chip-level and wafer-level testing of optical devices and electro-optical devices at high RF frequencies, as well as the testing of electro-optical sub-modules and sub-systems. You will work closely with an excellent multidisciplinary team working on advanced photonics.

Responsibilities:

• Develop various photonics testing capabilities for both chips and wafers, including design and building of measurement setups
• Perform chip-scale and wafer-scale data collection for OE, EO and OO devices from frequency range of 0 to 110 GHz
• Optimize data acquisition and analysis process to improve test efficiency, e.g. automation of measurement processes for wafer-scale testing and corner analysis
• Manage photonics laboratory including facilities, health and safety, equipment calibration, inventory and stocktake
• Take the lead to procure laboratory equipment and consumables
• Prepare technical presentations and papers for internal meetings, as well as conferences and journals
• Collaborate with project team to ensure quality and on-time delivery for various projects
• Performs other duties as assigned.

Qualifications:

• Bachelor’s or master’s degree in Physics, Electronic/Electrical Engineering, Photonics, Opto-electronics or equivalent
• More than 5 years hands-on experience in active photonics/optoelectronic device testing, especially for high-speed optical modulator and photodetector devices and electronic-photonic integrated circuit.
• More than 5 years hands-on experiences in optical setup construction and semiconductor & optoelectronic device characterization
• Experienced on experimental data acquisition and analysis
• Skillsets in programming or instrument automation is a plus
• Strong skills in problem-solving, communication and providing technical presentations
• Industry experience and awareness is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

The Singapore University of Technology and Design (SUTD) is looking for Research Assistants (RA) for the NSoE Phase II Maritime Sector. The RA will design and conduct experiments on the maritime testbed MariOT, and assist Research Fellows to develop prototypes and tools.

Qualification & Experience:

• Bachelor’s or Master’s degree in any area of engineering.
• Demonstrated expertise in C/C++ or Python programming.
• Working knowledge of computer networks.
• Working knowledge of applied cryptography and/or applied machine learning is advantageous.
• Working knowledge in software testing is advantageous.
• Familiarity with shipboard OT systems is advantageous.